Virtual Pointer Field for Polymorphic High-Level Synthesis

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Solution Overview

Problem

The complexity of integrated circuit design leads to inconsistencies and errors due to the need for separate high-level simulation and low-level implementation representations, increasing design cycle time and potential for mistakes, especially in distributed design teams.

Innovation Solution

Incorporating a virtual pointer field (vptr) in dynamic classes to encode type information, allowing for conditional virtual function calls based on decoded types, enabling efficient runtime resolution of virtual function calls and reducing the need for dynamic casts and type identification, thus supporting synthesizable constructs within a high-level synthesis tool.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If separate high-level simulation and low-level implementation representations are used, then design flexibility and abstraction are improved, but design consistency and error reduction deteriorate

Engineering Contradiction:
Improvedesign flexibilityVSAvoiddesign consistency
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent merges high-level simulation and low-level implementation representations into a unified SystemC-based framework. By using SystemC classes and virtual functions, the same high-level design description can be directly synthesized into low-level implementation, eliminating the need for separate representations and manual translation, thus ensuring design consistency while maintaining flexibility

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces a high-level synthesis tool as an intermediary that automatically translates SystemC high-level descriptions into synthesizable low-level code. This intermediary ensures consistent interpretation of design intent across both simulation and implementation phases, reducing errors from manual translation while preserving design adaptability

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If separate high-level and low-level design representations are maintained, then design abstraction is improved, but design cycle time increases due to multiple verification steps

Engineering Contradiction:
Improvedesign abstractionVSAvoiddesign cycle time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent combines high-level simulation and low-level implementation workflows into a single unified process using SystemC. The same high-level description serves both simulation and synthesis purposes, eliminating redundant verification steps and manual translation work, thus reducing design cycle time while maintaining abstraction benefits

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent performs low-level synthesis actions preliminarily during the high-level design phase. By using high-level synthesis tools to generate synthesizable code from SystemC descriptions early in the design process, designers can verify implementation feasibility before finalization, reducing iterative rework and accelerating the overall design cycle

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If dynamic polymorphism is supported in high-level synthesis, then design expressiveness is improved, but implementation complexity increases

Engineering Contradiction:
Improvedesign expressivenessVSAvoidimplementation complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts the complexity of dynamic polymorphism resolution from runtime execution to compile-time processing. By using virtual function tables and type encoding in the vptr, the system resolves polymorphic calls statically where possible, reducing runtime overhead and simplifying the implementation of dynamic behavior in synthesized hardware

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS8458630B1Supporting dynamic aspects of polymorphism in high-level synthesis of integrated circuit designs
Publication Date: 2013.06.04 CADENCE DESIGN SYST INC
  • US8458630B1 patent drawing
  • US8458630B1 patent drawing
  • US8458630B1 patent drawing

AI summary

A method for integrated circuit design is disclosed including determining if at least one dynamic class and at least one virtual function are present within a chip program description of an integrated circuit design; and if so then converting the at least one virtual function into a non-virtual function, generating at least one virtual pointer for the at least one dynamic class, converting at least one function calling the at least one virtual function into at least one conditional function responsive to a value of the at least one virtual pointer, and generating dataflow graphs of the at least one dynamic class and the at least one conditional function that can be transformed into a synthesizable design description of the integrated circuit design.