Virtual Port Logic for Dynamic Memory Allocation in PLDs

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Solution Overview

Problem

Current circuit design for programmable logic devices (PLDs) requires significant time and effort for explicit memory architecture specification, limiting flexibility in memory management.

Innovation Solution

A method and apparatus for memory management in integrated circuits, involving user logic, virtual port logic, and a processor that facilitates allocation, access, and de-allocation of memory space through a virtual port logic that forwards requests to the processor, allowing for dynamic memory management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If explicit memory architecture specification is required in circuit design, then memory allocation can be controlled precisely, but design time and effort increase significantly

Engineering Contradiction:
Improvememory allocation precisionVSAvoiddesign time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The memory management system performs self-service through automatic allocation and de-allocation of memory spaces. The virtual port logic autonomously forwards allocation requests to the processor, which automatically assigns memory spaces without requiring manual intervention from the circuit designer, thereby reducing design time while maintaining precise memory control

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The virtual port logic acts as an intermediary between user logic and the processor. It receives allocation requests from user logic, forwards them to the processor, and manages the memory allocation process automatically. This intermediary mechanism enables precise memory control through structured request handling while eliminating the need for designers to manually specify memory architectures

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If manual memory architecture design is required, then memory can be optimized for specific functions, but flexibility in memory management is reduced

Engineering Contradiction:
Improvememory optimizationVSAvoidmemory management flexibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The memory management system is dynamic rather than static. Memory spaces can be allocated and de-allocated on-demand based on runtime requirements. The virtual port logic dynamically forwards allocation requests to the processor, which dynamically assigns memory spaces, enabling the system to adapt to changing functional requirements while maintaining optimized memory usage

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The memory management system provides universal functionality by handling multiple types of allocation requests through a unified virtual port logic interface. The same mechanism serves both static optimization needs and dynamic flexibility requirements, making the system versatile enough to handle various memory management scenarios without requiring separate manual design approaches

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7454587B1Method and apparatus for memory management in an integrated circuit
Publication Date: 2008.11.18 XILINX INC
  • US7454587B1 patent drawing
  • US7454587B1 patent drawing
  • US7454587B1 patent drawing

AI summary

Method and apparatus for managing memory logic is described. In one example, user logic, virtual port logic, and a processor are provided. The user logic is configured to provide allocation requests for the memory logic, access requests for the memory logic, and de-allocation requests for the memory logic. The virtual port logic is coupled to the user logic and the memory logic. The processor is coupled to the virtual port logic. The virtual port logic is configured to forward the allocation requests and de-allocation requests to the processor, and to process the access requests. The processor is configured to allocate space in the memory logic in response to the allocation requests and de-allocate space in the memory logic in response to the de-allocation requests.