Virtual Power Rail Voltage Control for Low-Power State Retention
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Solution Overview
Problem
Existing power management techniques for logic circuitry in low power data retention modes face challenges in reducing power consumption without losing data and incurring extended wake-up times, due to high standby leakage currents and the need for complex and area-intensive circuitry to restore state.
Innovation Solution
A voltage regulator system that includes switching circuitry and a leakage power controller to adjust the voltage level of a virtual power rail, allowing for precise control of power consumption while maintaining data integrity, using semiconductor devices operating in saturation regions and feedback mechanisms to manage leakage currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If switch blocks are used to isolate the virtual power rail from the main power rail to reduce power consumption, then power consumption is reduced, but state within the logic circuitry is lost and wake-up time increases
Solution Approach 1:
The patent applies local quality by maintaining different voltage levels in different regions of the circuit: the virtual power rail is maintained at a reduced voltage level to minimize leakage current, while the logic circuitry remains powered at a sufficient voltage level to retain its state. This spatial differentiation allows simultaneous power savings and state retention without requiring balloon latches or extended wake-up circuits.
2Reliability
If balloon latches are provided within logic blocks to store state signal values, then state can be restored when required, but circuit area overhead and restoration time increase
Solution Approach 1:
The patent extracts the state retention function from the logic blocks themselves and relocates it to the virtual power rail maintenance mechanism. Instead of embedding balloon latches within each logic block to store state, the system maintains state by keeping the virtual power rail powered at a reduced voltage level, thereby eliminating the need for additional retention circuitry within the logic blocks and reducing overall circuit area overhead.
3Loss of energy
If supply voltage is reduced to reduce standby leakage current, then leakage current decreases, but logic circuitry may lose state or require extended wake-up time
Solution Approach 1:
The patent applies dynamics by implementing adjustable voltage control on the virtual power rail. The voltage level on the virtual power rail can be dynamically adjusted to different reduced levels depending on the operational mode: a first reduced voltage level is used when logic circuitry is active to maintain proper operation, while a second, lower voltage level is used when logic circuitry is inactive to minimize leakage current. This dynamic voltage adjustment allows the system to optimize between power savings and state retention based on operational requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces power consumption in low power data retention modes while minimizing data loss and wake-up times, with a fine level of control over voltage levels and minimal additional circuitry overhead, thereby enhancing energy efficiency and reducing leakage currents.
Implementation Method 1
switching circuitry to switch to a conductive state in which said switching circuitry is operating outside of a linear region of operation and supplying a current from said power supply via said virtual power rail
Implementation Method 2
a leakage power controller for adjusting a voltage level of said virtual power rail to control leakage power, said leakage power controller being configured to supply a bias voltage to said well in which said switching circuitry is formed, said current of said switching circuitry being dependent on a value of said well bias voltage
Data Source
AI summary
A voltage regulator for regulating a voltage level of a virtual power rail supplying power to logic circuitry in a low power data retention mode is disclosed. The voltage regulator comprises: switching circuitry having a transistor for coupling said virtual power rail to a power supply having a supply voltage level; control circuitry responsive to a signal indicating the logic circuitry is to enter the low data power retention mode to control the switching circuitry to switch to a conductive state in which the transistor is operating in a saturation region of operation and supplying a saturation current from the power supply via the virtual power rail to the logic circuitry; and a leakage power controller for adjusting a voltage level of the virtual power rail to control leakage power. The leakage power controller is configured to supply a bias voltage to the well in which the switching circuitry is formed, the saturation current of the switching circuitry being dependent on a value of the well bias voltage. The leakage power controller is configured to adjust the well bias voltage of the switching circuitry thereby varying the saturation current and the voltage level of the virtual power rail.