Virtual Processor Interrupt Handling Without Host Trap Overhead
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Solution Overview
Problem
The processing delay of interrupt requests in virtualized devices is increased due to the need to traverse multiple software layers and switch between different running statuses, particularly when applications are deployed on virtual computers, leading to increased service processing delays.
Innovation Solution
A virtualized device configuration that allows virtual processors to directly receive interrupt requests from the hardware layer by modifying register bits, enabling direct processing without traversing multiple layers, and utilizing interrupt service routines based on stored correspondence information, and employing IPI interrupts to distribute requests among in-service processors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If interrupt requests are processed through the host layer in virtualized devices, then interrupt service can be provided to virtual computers, but processing delay increases due to traversing multiple software layers and switching between running statuses
Solution Approach 1:
The patent segments the interrupt processing path by separating host-mode interrupt handling from guest-mode interrupt handling. Virtual processors are configured to directly receive and process interrupt requests in guest mode without requiring host layer intervention, thus dividing the processing workload and reducing delays while maintaining service capability through the virtualization architecture
Solution Approach 2:
The patent introduces a register bit as an intermediary mechanism that enables virtual processors to directly receive interrupt requests from hardware. This intermediary configuration allows interrupt requests to bypass the host layer mediator and be delivered directly to the virtual computer layer, reducing processing delay while maintaining the virtualization mediation function
2Loss of time
If virtual processors directly receive interrupt requests by modifying register bits, then processing delay is reduced, but system complexity increases due to mode switching and register configuration
Solution Approach 1:
The patent implements self-service by enabling virtual processors to autonomously receive and process interrupt requests in guest mode without requiring host layer assistance. The register bit configuration allows the virtual processor to service its own interrupts directly, reducing the need for complex host-mediated processing while maintaining system manageability through simple register control
3Productivity
If interrupt service routines are deployed on virtual computers, then service processing can be performed, but delay increases due to cross-layer distribution requirements
Solution Approach 1:
The patent extracts the interrupt processing function from the host layer and places it directly in the virtual computer layer. By taking out the interrupt service routine execution from the host-mediated path and enabling direct execution in guest mode, the system maintains full service processing capability while eliminating the time-consuming cross-layer distribution steps
Data Source
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AI summary
This application provides a virtualized device, and an interrupt processing method running on the virtualized device. The method includes: performing, by a processor, the following operations in a guest mode: receiving, by the processor, an interrupt request from hardware; determining, by the processor, a processing entity of the received interrupt request based on a correspondence between the interrupt request and the processing entity; and when the processing entity of the received interrupt request includes the virtual processor currently running on the processor, determining, by the processor based on a correspondence between the interrupt request and an interrupt service routine, the interrupt service routine corresponding to the received interrupt request, and invoking the interrupt service routine to process the interrupt request. In this manner, trap-in and trap-out of a processor can be avoided for an application interrupt request, thereby reducing a processing delay of the application interrupt request.