Virtual Reference Image Generation for Semiconductor Inspection

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Solution Overview

Problem

Current semiconductor manufacturing inspection techniques, such as die-to-die and die-to-standard reference die inspection, are inadequate for detecting systematic and repeater defects due to limitations in generating accurate standard reference dies, which can be defective and fail to capture wafer-to-wafer process variations, leading to skewed inspection results.

Innovation Solution

A system comprising a virtual system coupled with actual systems to identify and eliminate defective portions from multiple specimens, generating a reference image based on output from actual systems, which includes a computer system and storage medium, allowing for the creation of a reference image that is not physically interacting with specimens, thereby overcoming the limitations of traditional methods.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a standard reference die is created using single die or multi-die information from a single wafer, then the reference image can be generated for inspection, but the reference image cannot capture wafer-to-wafer process variations and may contain defects from the setup wafer

Engineering Contradiction:
Improveaccuracy of reference imageVSAvoidwafer-to-wafer process variation data
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent combines inspection data from multiple wafers to generate the reference image. Instead of using a single setup wafer, the system aggregates information from multiple wafers processed through the fabrication process, thereby capturing wafer-to-wafer process variations while eliminating defects that are specific to individual wafers. This merging approach ensures the reference image represents the true process characteristics without being skewed by defects present in any single wafer.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If die-to-die inspection techniques are used to compare test die to each other, then random defects can be detected, but systematic and repeater defects cannot be detected

Engineering Contradiction:
Improvedetection of random defectsVSAvoiddetection of systematic defects
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent creates a virtual reference image that serves as an ideal template representing the intended design pattern. Instead of comparing test die to each other (die-to-die), the system compares each test die against this virtual reference copy. This copying approach enables detection of both random defects (deviations from the reference) and systematic defects (repeated patterns that differ from the reference), thereby resolving the limitation of die-to-die inspection methods.

Inventive Principle:
Principle #26Copying

3Ease of manufacture

If standard reference die inspection is performed using a reference die from a single setup wafer, then the inspection process can be implemented, but the results are skewed by defects present on the setup wafer and color variations between test die and reference die

Engineering Contradiction:
Improveimplementation of inspection processVSAvoidaccuracy of inspection results
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The patent introduces a virtual reference image as an intermediary between the test die and the inspection process. This virtual reference is generated through image processing and data aggregation from multiple wafers, serving as a neutral mediator that eliminates the problems of physical reference die defects and color variations. The virtual reference acts as an ideal template that represents the intended design without being affected by manufacturing variations or defects present in any single physical wafer.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Device complexity

If a standard reference die is generated from only a single setup wafer, then the reference image can be created, but it cannot present process variation that occurs from wafer-to-wafer

Engineering Contradiction:
Improvesimplicity of reference image generationVSAvoidprocess variation data
Core Design Contradiction:
Device complexityVSLoss of information

Solution Approach 1:

The patent merges inspection data from multiple wafers to generate the reference image, thereby capturing the full range of wafer-to-wafer process variations. By combining information from multiple wafers processed through the same fabrication process, the system creates a reference image that represents the aggregate process characteristics including all process variations. This approach maintains relatively simple implementation while preserving comprehensive process variation data.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11276161B2Reference image generation for semiconductor applications
Publication Date: 2022.03.15 KLA CORP
  • US11276161B2 patent drawing
  • US11276161B2 patent drawing
  • US11276161B2 patent drawing

AI summary

Methods and systems for generating a reference image for use in a process performed for a specimen are provided. One system includes a virtual system configured to receive output generated by actual systems for specimens, each of which has device areas of the same type formed thereon. The virtual system is configured for identifying defective portions of the device areas based on the output generated for the specimens by at least two of the actual systems and eliminating the defective portions of the device areas from the device areas in which the defective portions were identified to thereby generate remaining portions of the device areas. In addition, the virtual system is configured for generating a reference image from the output generated for the remaining portions of at least one device area on a first of the specimens and at least one device area on a second of the specimens.