Virtual Register Mode Feedback Path for CPU Power Reduction
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Solution Overview
Problem
Conventional CPU architectures require frequent read and write accesses to register files for data processing, leading to power consumption issues, especially in low-power applications, and potential interruptions during program execution.
Innovation Solution
An electronic device with a temporary register and a second feedback path from the execution unit's output, allowing data to be directly reused without writing to the register file, reducing power consumption and ensuring atomic operations by using a virtual register mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If read and write accesses to register files are performed for every data processing operation, then data integrity and reliability are improved, but power consumption increases
Solution Approach 1:
The feedback path is segmented into two separate paths: a first feedback path that writes to the register file (ensuring reliability) and a second feedback path that directly feeds back to the execution unit (reducing power consumption). The switch allows selection between these paths based on operational requirements.
Solution Approach 2:
The system dynamically switches between two operational modes: normal mode where results are written to the register file for reliability, and virtual register mode where results are directly fed back to the execution unit for low-power operations. This dynamic adaptation resolves the contradiction between reliability and power consumption.
2Reliability
If register file write operations are performed for every processing step, then data safety is improved, but processing speed decreases
Solution Approach 1:
The second feedback path is pre-configured and ready to immediately feed back results to the execution unit without waiting for register file write operations. This preliminary preparation of the data path eliminates write delays and improves processing speed when in virtual register mode.
Solution Approach 2:
The switch enables dynamic mode changing between safety-critical operations (using register file writes) and performance-critical operations (using direct feedback). This allows the system to optimize for speed when data safety can be maintained through other means.
3Ease of operation
If frequent register file accesses are performed, then operand availability is improved, but power consumption increases
Solution Approach 1:
The invention extracts the essential feedback function from the register file write path and creates a separate direct feedback path. This extraction allows operand availability to be maintained through the second feedback path while eliminating the power-consuming register file write operations.
Solution Approach 2:
The switch acts as an intermediary that directs the feedback signal to either the register file or directly to the execution unit input. This intermediary component enables the system to choose the low-power path when operand availability can be maintained without register file writes.
4Adaptability or versatility
If program execution allows interruptions for events and internal nodes, then system responsiveness is improved, but data processing integrity decreases
Solution Approach 1:
The virtual register mode creates a dynamic execution environment where the execution unit operates with direct feedback, forming an atomic sequence that cannot be interrupted. This dynamic mode switch allows the system to prioritize data integrity for critical operations while maintaining responsiveness capability for non-critical operations.
Solution Approach 2:
The second feedback path enables continuous data flow from the execution unit output back to its input without interruption from register file write cycles or external events. This continuous action ensures data processing integrity by maintaining an unbroken execution sequence.
Data Source
AI summary
The invention relates to an electronic device for data processing, which includes an execution unit with a temporary register, a register file, a first feedback path from the data output of the execution unit to the register file, a second feedback path from the data output of the execution unit to the temporary register, a switch configured to connect the first feedback path and/or the second feedback path, and a logic stage coupled to control the switch. The control stage is configured to control the switch to connect the second feedback path if the data output of an execution unit is used as an operand in the subsequent operation of an execution unit.


