Virtual Resource Block Mapping in Full Duplex Slots

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In wireless communications, existing systems face inefficiencies in decoding transmissions due to inconsistent interleaving configurations in full duplex slots, leading to self-interference and decreased network performance.

Innovation Solution

User equipment (UE) selects an appropriate interleaving configuration based on scheduling information, bandwidth part position, or indications from the base station, allowing for flexible configuration of full duplex or half duplex interleaving to mitigate self-interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a fixed interleaving configuration is used in full duplex slots, then device complexity is reduced, but self-interference increases and decoding reliability deteriorates

Engineering Contradiction:
Improveinterleaving configuration complexityVSAvoiddecoding reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent implements dynamic selection of interleaving configuration based on the duplex mode of the slot. The UE determines whether to apply full duplex interleaving or half duplex interleaving configuration based on whether the slot is configured for full duplex communications, allowing the system to adapt to different operational conditions rather than using a fixed configuration

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the interleaving configuration parameter based on the slot type. When a slot is configured for full duplex communications, the UE applies a specific interleaving configuration (e.g., full duplex interleaver) that differs from the configuration used in half duplex slots, thereby optimizing performance for the specific operational mode

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If inconsistent interleaving configurations are used in full duplex slots, then adaptability to different communication modes is improved, but self-interference increases and network performance deteriorates

Engineering Contradiction:
Improveadaptability to duplex modesVSAvoidself-interference
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies different interleving configuration parameters based on the duplex mode. For full duplex slots, a specific interleaving configuration is used that accounts for simultaneous uplink and downlink transmissions, thereby reducing self-interference compared to using inconsistent or inappropriate configurations

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent converts the potential harm of self-interference in full duplex communications into a benefit by applying a specialized interleaving configuration that is specifically designed to mitigate self-interference effects, thereby improving overall system performance despite the challenging operational conditions

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Loss of energy

If default interleaving configuration is assumed without explicit indication, then signaling overhead is reduced, but decoding accuracy deteriorates due to configuration mismatches

Engineering Contradiction:
Improvesignaling overheadVSAvoiddecoding accuracy
Core Design Contradiction:
Loss of energyVSMeasurement precision

Solution Approach 1:

The patent enables the UE to self-determine the appropriate interleaving configuration by examining the slot configuration for full duplex communications. The UE autonomously selects the correct interleaving mode (full duplex or half duplex) based on the scheduling information and slot type, eliminating the need for explicit base station indications while ensuring accurate configuration selection

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20230118475A1Virtual resource block to physical resource block mapping in duplex slots
Publication Date: 2023.04.20 QUALCOMM INC
  • US20230118475A1 patent drawing
  • US20230118475A1 patent drawing
  • US20230118475A1 patent drawing

AI summary

Methods, systems, and devices for wireless communications are described that support virtual resource block (RB) to physical RB mapping in duplex slots. The described techniques enable a user equipment (UE) to select an interleaving configuration such as a full duplex or half duplex interleaving configuration for a slot that may be configured for full duplex communications. In some cases, the UE may use a default interleaving configuration for a given slot or may determine the interleaving configuration based on a bandwidth part (BWP) position or resource bandwidth within the slot, such as a location within the frequency domain of a downlink BWP relative to an uplink BWP.