Virtual Switch Acceleration via RDT Cache Allocation

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Solution Overview

Problem

Network switching performance is negatively impacted by the noisy neighbor problem, where data center co-tenants with signaling characteristics that monopolize network bandwidth cause uneven network performance, leading to memory thrashing and reduced switching speed.

Innovation Solution

Implementing a global sub-table priority map in Open vSwitch (OVS) to rank classifier sub-tables based on usage frequency, pre-fetching high usage frequency sub-tables, and using Resource Director Technology (RDT) to monitor and control resource allocation, reducing eviction from the last level cache and optimizing switching speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If shared fast access memory is used for network switching, then memory access speed is improved, but memory thrashing occurs due to noisy neighbor evictions

Engineering Contradiction:
Improvememory access speedVSAvoidmemory stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent segments the shared fast access memory into dedicated regions for different network functions. By isolating the memory space used by packet processing from the memory space used by signaling processes, the system prevents noisy neighbor evictions while maintaining fast memory access for packet switching operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a memory manager as an intermediary component that mediates between different network functions and the shared memory. This memory manager allocates and manages memory regions, ensuring that packet processing has dedicated fast access memory while signaling processes use separate memory space, thus preventing thrashing.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If classifier sub-tables are stored in shared memory, then memory utilization is improved, but switching speed decreases due to eviction and re-loading

Engineering Contradiction:
Improvememory utilizationVSAvoidswitching speed
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent implements preliminary action by pre-loading frequently accessed classifier sub-tables into dedicated fast access memory regions before they are needed for packet processing. This ensures that when packet switching occurs, the required sub-tables are already available in memory, eliminating eviction and re-loading delays while maintaining efficient memory utilization.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If Resource Director Technology is implemented, then resource allocation control is improved, but system complexity increases

Engineering Contradiction:
Improveresource allocation flexibilityVSAvoidsystem complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements Resource Director Technology as a multi-functional mechanism that handles multiple tasks: memory region allocation, priority-based resource distribution, and isolation of network functions. By combining these functions into a single unified system, the patent achieves flexible resource allocation without proportionally increasing system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10187308B2Virtual switch acceleration using resource director technology
Publication Date: 2019.01.22 INTEL CORP
  • US10187308B2 patent drawing
  • US10187308B2 patent drawing
  • US10187308B2 patent drawing

AI summary

A virtual switch configured to switch packets between virtual switch ports based on classifier sub-tables. The virtual switch reserves blocks of last level cache for classifier sub-table storage. The virtual switch also maintains a global sub-table priority map for the classifier sub-tables. The global sub-table priority map indicates usage frequency of each classifier sub-table when switching the packets between the ports. A sub-set of the classifier sub-tables with a highest usage frequency, according to the global sub-table priority map, are pre-fetched to the reserved blocks of the last level cache. By pre-fetching the most used classifier sub-tables, memory related bottlenecks are reduced when searching through classifier sub-tables. This mechanism increases processing speed when matching packets/flows to classifier sub-tables, resulting in faster packet switching by the virtual switch. The virtual switch may leverage Cache Allocation Technology (CAT)/Code and Data Prioritization technology (CDP) to prevent cache eviction.