Virtual TCAM Modules With Hash Mapping for Uneven Data Sets

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Solution Overview

Problem

Integrated circuits containing multiple ternary content addressable memory (TCAM) modules experience uneven usage due to varying data set sizes, leading to inefficient utilization of physical memory locations.

Innovation Solution

The implementation of a content addressable memory circuit with multiple virtual modules, each with its own assigned memory address range and virtual hash table, allows for efficient storage and retrieval of key values by using hash logic to determine hash values based on received key values and memory address ranges, enabling simultaneous access to memory locations across the circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple physical TCAM modules with identical capacity are used to store different data sets, then storage capacity is sufficient, but memory usage becomes uneven and efficiency decreases

Engineering Contradiction:
Improvestorage capacityVSAvoidmemory usage efficiency
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent divides a single physical TCAM module into multiple virtual modules (VMs), each capable of storing different data sets. This segmentation allows flexible allocation of memory space to match varying data set sizes, eliminating the waste of empty locations that occurs when using multiple identical physical modules. Each VM can be independently configured with appropriate memory capacity for its specific data set requirements.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If TCAM modules are allocated based on maximum data set size, then all data sets can be stored, but smaller data sets waste memory locations

Engineering Contradiction:
Improvedata set accommodationVSAvoidempty memory locations
Core Design Contradiction:
Adaptability or versatilityVSLoss of substance

Solution Approach 1:

The patent implements virtual modules with locally optimized memory allocation, where each VM has its own assigned memory address range tailored to the specific size requirements of its data set. This allows different regions of the physical TCAM to have different effective capacities, matching the actual needs of each data set rather than forcing uniform allocation across all modules.

Inventive Principle:
Principle #3Local quality

3Productivity

If virtual modules with assigned memory address ranges are implemented, then memory usage efficiency improves, but system complexity increases

Engineering Contradiction:
Improvememory usage efficiencyVSAvoidsystem structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces virtual module identifiers and hash tables as intermediary structures that manage the mapping between virtual modules and physical memory locations. These intermediaries provide an abstraction layer that simplifies the management of segmented memory space, allowing efficient allocation and access without requiring complex hardware modifications to the underlying TCAM structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11899985B1Virtual modules in TCAM
Publication Date: 2024.02.13 DREAMBIG SEMICON INC
  • US11899985B1 patent drawing
  • US11899985B1 patent drawing
  • US11899985B1 patent drawing

AI summary

A content addressable memory circuit comprising: a memory device array including multiple memory devices coupled for simultaneous access to memory address locations that share a common memory address; multiple virtual modules (VMs), wherein each VM stores a data set that includes key values stored within an assigned memory address range within the memory array that are assigned to the VM; wherein each VM, stores a virtual hash table in non-transitory memory, that associates hash values with memory addresses within an assigned memory address range of the VM; hash logic is operable to determine a hash value, based upon a received key value and a respective assigned memory address range; and memory controller logic is operable to use a virtual hash table to access a memory address in an assigned memory address range, based upon the determined hash value.