Virtual Vsync Signal Generation for Display Frame Rendering

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Low-performance hardware configurations in mobile devices lead to frame skipping during display refreshing, reducing the timeliness of the display process due to prolonged Render and Compose operations exceeding the Vsync signal cycle.

Innovation Solution

A method involving virtual vertical synchronization signals, which are obtained by delaying system vertical synchronization signals, is used to trigger Render and Compose operations, optimizing the execution manner of each application and the application framework layer to reduce frame skipping and improve display frame rate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If the system uses standard Vsync signal to trigger Render and Compose operations, then the display refreshing order is maintained, but the Render and Compose operations exceed the Vsync signal cycle on low-performance hardware, causing frame skipping

Engineering Contradiction:
Improvedisplay refreshing orderVSAvoiddisplay frame rate
Core Design Contradiction:
Stability of the object's compositionVSProductivity

Solution Approach 1:

The patent introduces virtual Vsync signals that are generated in advance before the actual system Vsync signal arrives. These preliminary virtual Vsync signals trigger the Render and Compose operations to start earlier, allowing the processing to be completed within the actual Vsync cycle. This preliminary action prevents frame skipping by ensuring operations finish before the next frame needs to be displayed, while maintaining the correct display order through synchronization with the actual Vsync signal.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the Render and Compose operations are executed on low-performance hardware, then the processing is completed, but the duration exceeds the Vsync signal cycle, leading to frame skipping and reduced timeliness

Engineering Contradiction:
Improveprocessing completionVSAvoidwaiting duration
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

By generating virtual Vsync signals in advance, the patent allows Render and Compose operations to start earlier than they would with standard Vsync timing. This preliminary action ensures that even on low-performance hardware, the operations have sufficient time to complete before the actual display refresh, eliminating frame skipping and reducing waiting duration while maintaining processing reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The virtual Vsync signal acts as an intermediary between the system Vsync signal and the Render/Compose operations. It mediates the timing by triggering operations at an optimized start time that allows low-performance hardware to complete processing within the available cycle, thereby reducing time loss without compromising processing completion.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If the system waits for Render and Compose operations to complete before displaying, then the display accuracy is maintained, but the timeliness of display refreshing is reduced due to prolonged processing duration

Engineering Contradiction:
Improvedisplay accuracyVSAvoiddisplay refreshing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent triggers Render and Compose operations in advance using virtual Vsync signals, allowing the processing to start earlier and complete within the actual Vsync cycle. This ensures display accuracy is maintained because the operations still complete before the frame is displayed, while simultaneously reducing the overall display refreshing time by eliminating frame skipping and optimization waits.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3056983B1Display frame generation method and terminal device
Publication Date: 2018.12.05 HUAWEI DEVICE CO LTD
  • EP3056983B1 patent drawingFigure 1
  • EP3056983B1 patent drawingFigure 2
  • EP3056983B1 patent drawingFigure 3

AI summary

The present invention discloses a method for generating a display frame and a terminal device. The method for generating a display frame includes: in a case in which it is determined that an execution result of a Render operation of each application currently running on a terminal device or a Compose operation of an application framework layer of a terminal device meets a predetermined condition, adjusting a Render execution manner of each application and a Compose execution manner of the application framework layer; executing, by each application, a Render operation in an adjusted Render execution manner to render an image of each application; and executing, by the application framework layer, a Compose operation in an adjusted Compose execution manner to compose a display frame from the images of the applications. According to the method for generating a display frame and the terminal device in the present invention, a Render execution manner of each application and a Compose execution manner of an application framework layer can be controlled to reduce frame skipping caused by an improper Render execution manner and an improper Compose execution manner, which effectively optimizes a display frame rate of a system of the terminal device, thereby effectively improving timeliness of display refreshing of the terminal device.