Virtual Write Buffer for Network Storage Latency
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Solution Overview
Problem
In current networked storage systems, CPUs spend a significant amount of processing power on protocol processing of network messages, leading to reduced availability for other tasks due to the need for double-trip data transfers across the I/O bus during data reassembly from segmented records.
Innovation Solution
The implementation of a virtual write buffer (VWB) in the network controller allows for the virtual reassembly of data segments directly into private buffers, eliminating the need for double-trip data transfers by using memory object descriptors and a VWB table to manage and align segments for direct memory access to the I/O controller.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data segments are reassembled in host memory using traditional methods, then data can be transferred to storage, but the data must make a double-trip across the I/O bus which increases latency and reduces productivity
Solution Approach 1:
The patent introduces a virtual write buffer (VWB) as an intermediary structure in network controller memory that enables direct reassembly of data segments from the network into private buffers without requiring data to traverse the I/O bus to host memory and back. The VWB contains descriptors that map network segments directly to private buffer locations, eliminating the double-trip latency while maintaining proper data reassembly functionality.
2Reliability
If the CPU processes network protocol layers for each packet, then data can be reassembled correctly, but the CPU spends significant processing power on protocol processing which reduces availability for other tasks
Solution Approach 1:
The patent extracts the protocol processing function from the CPU by implementing it in hardware within the network controller. The network controller autonomously handles TCP/IP protocol processing, segment reassembly, and VWB descriptor management, removing this processing burden from the CPU while ensuring accurate data reassembly through dedicated hardware logic designed for this specific function.
Solution Approach 2:
The network controller performs self-service by autonomously managing the entire data reassembly process without CPU intervention. It receives network segments, processes protocol headers, reassembles data in the VWB, and directly transfers reassembled data to private buffers, making the system self-sufficient for network data handling and freeing the CPU for other computational tasks.
3Ease of operation
If private buffers are allocated in host memory for each incoming record, then data organization is achieved, but the data must be sent back over the I/O bus which increases device complexity and reduces efficiency
Solution Approach 1:
The patent changes the spatial dimension of data storage by allocating private buffers directly in network controller memory space rather than host memory. This dimensional shift allows the network controller to organize data in private buffers locally and transfer only the necessary data portions to the host via optimized paths, eliminating the need for complete data round-trips over the I/O bus and reducing bus traffic complexity.
Data Source
AI summary
A method for accelerating storage access in a network. The method comprises receiving a data record having a plurality of data segments. The data segments are stored in a local memory of a network controller (NC). A virtual write buffer (VWB) entry is assigned for the incoming data record in the NC local memory. The data segments of said data record are reassemble using the VWB. The data record is sent from the network controller directly to an I/O controller of a storage device.