Virtualization Bridge Device for SR and MR I/O Sharing

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Solution Overview

Problem

Endpoint manufacturers face the challenge of having to create two different products to support both Single Root (SR) and Multi-Root (MR) I/O Virtualization systems, due to different endpoint extensions being required for each, which increases implementation costs and complexity.

Innovation Solution

A design that enables SR endpoints to function as MR endpoints in MR systems, allowing them to operate in both SR-IOV and MR-IOV environments using a shared I/O device architecture with a switch fabric that maps memory spaces and translates addresses, enabling SR endpoints to be shared across multiple roots.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If endpoint manufacturers create separate products for SR and MR I/O Virtualization systems, then each system can have optimized performance, but manufacturing costs and product complexity increase

Engineering Contradiction:
Improvesystem performance optimizationVSAvoidproduct variety and manufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a universal endpoint device architecture that can function in both SR-IOV and MR-IOV systems through a shared I/O device with multiple functions. The device includes a switch fabric that can operate in different modes (SR mode with single root complex, MR mode with multiple root complexes) and memory space mapping mechanisms that adapt to either configuration, allowing one product to serve multiple virtualization scenarios without sacrificing performance optimization

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The endpoint device employs dynamic configuration capabilities where the switch fabric and memory space mapping can be reconfigured based on the operational mode. The device can dynamically switch between SR and MR modes, adjusting its internal routing tables, memory window configurations, and root complex associations to optimize performance for the current operational context while maintaining hardware compatibility

Inventive Principle:
Principle #15Dynamics

2Ease of manufacture

If SR endpoints are used in MR systems, then manufacturing costs decrease, but address translation and memory space mapping complexity increases

Engineering Contradiction:
Improveproduction costVSAvoidaddress translation mechanism
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent introduces a switch fabric as an intermediary component between multiple root complexes and the shared I/O device functions. This switch fabric acts as a mediator that handles address translation and memory space mapping automatically, converting addresses from different root memory spaces to the appropriate device local memory space portions. This intermediary approach simplifies the overall system architecture by centralizing the translation logic in the switch fabric rather than requiring complex translation mechanisms in each endpoint

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The endpoint device utilizes parameter changes in memory space mapping configurations to adapt to different operational modes. The switch fabric can be programmed with different routing tables, memory window sizes, and base address registers depending on whether the system is operating in SR or MR mode. By dynamically changing these parameters, the same hardware can support both configurations without requiring duplicate endpoint devices

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7979592B1Virtualization bridge device
Publication Date: 2011.07.12 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US7979592B1 patent drawing
  • US7979592B1 patent drawing
  • US7979592B1 patent drawing

AI summary

A computer system includes a shared I/O device including functions providing access to device local memory space, and a plurality of roots coupled to the shared I/O device via a switch fabric. A first root assigns a first address in a first root memory space to a first function. A second root assigns a second address in a second root memory space to a second function. The switch fabric maps the first root memory space to a first portion of device local memory space and the second root memory space to a second portion of device local memory space. Subsequently, the switch receives a data transaction request from the first root targeted to the first address, translates the first address to a corresponding location in the first portion of the device local memory space based on the mapping, and routes the data transaction request to the I/O device.