Virtualizing PEBS via Processor Tracing and MSRs
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Solution Overview
Problem
Precise Event-Based Sampling (PEBS) is not effectively virtualized, leading to issues with page faults and multilevel page table violations in virtualized environments, which result in dropped records and interference with debugging and troubleshooting processes.
Innovation Solution
Packaging and routing PEBS data within a trace stream using processor tracing mechanisms that handle page faults and multilevel page table violations, allowing PEBS data to be output and retrieved alongside trace data, and using model-specific registers to configure and manage PEBS record generation independently of memory-based configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If PEBS is implemented in a virtualized environment using traditional memory-based configuration, then PEBS data can be collected, but page faults and multilevel page table violations occur causing record loss
Solution Approach 1:
The patent introduces a hybrid configuration mechanism that acts as an intermediary between memory-based and register-based configuration. Model-specific registers (MSRs) are used to store critical PEBS configuration data that can be accessed without triggering page faults, while still allowing the system to benefit from memory-based configuration for non-critical parameters. This intermediary approach resolves the contradiction by providing a reliable access path for essential PEBS data.
Solution Approach 2:
The patent segments the PEBS configuration into two parts: critical configuration data stored in model-specific registers (accessible without page faults) and non-critical data stored in memory. This segmentation allows the system to maintain reliable PEBS record collection by ensuring that the critical path uses register-based access while still utilizing memory-based configuration for flexibility.
2Adaptability or versatility
If PEBS uses memory-based configuration, then flexible configuration is possible, but multilevel page table violations interfere with debugging and troubleshooting
Solution Approach 1:
The hybrid configuration mechanism serves as an intermediary that provides both flexibility and ease of operation. By storing critical PEBS configuration in model-specific registers, the system eliminates page faults during PEBS data collection, making debugging and troubleshooting easier. At the same time, memory-based configuration is retained for non-critical parameters, preserving configuration flexibility.
Solution Approach 2:
The patent applies local quality by treating different parts of the PEBS configuration differently: critical configuration parameters are stored in model-specific registers with direct access properties, while non-critical parameters remain in memory with flexible access. This localized differentiation resolves the contradiction by optimizing each segment for its specific requirements.
3Loss of information
If traditional virtualization methods are used for trace data, then trace data can be captured, but PEBS data cannot be reliably virtualized
Solution Approach 1:
The patent introduces model-specific registers as an intermediary layer between the virtualization layer and PEBS hardware. This intermediary provides a direct access path for PEBS configuration and data collection that bypasses the limitations of traditional memory-based virtualization, enabling reliable PEBS virtualization while maintaining complete trace data capture.
Solution Approach 2:
The patent moves the PEBS configuration from the memory address space dimension to the model-specific register dimension. This dimensional change allows PEBS data to be collected reliably in virtualized environments by accessing configuration through registers that are not subject to page faults or multilevel page table violations, while trace data continues to be captured through traditional memory-based methods.
Data Source
AI summary
A core includes a memory buffer and executes an instruction within a virtual machine. A processor tracer captures trace data and formats the trace data as trace data packets. An event-based sampler generates field data for a sampling record in response to occurrence of an event of a certain type as a result of execution of the instruction. The processor tracer, upon receipt of the field data: formats the field data into elements of the sampling record as a group of record packets; inserts the group of record packets between the trace data packets as a combined packet stream; and stores the combined packet stream in the memory buffer as a series of output pages. The core, when in guest profiling mode, executes a virtual machine monitor to map output pages of the memory buffer to host physical pages of main memory using multilevel page tables.