Virtualized FEC Decoding with Cutoff-Time Block Prioritization
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Solution Overview
Problem
Resource-constrained systems in wireless communication face challenges in managing Forward Error Correction (FEC) processing efficiently, balancing compute resources with performance and cost, especially in scenarios requiring high reliability and low latency.
Innovation Solution
A method for dynamically managing FEC processing by setting a cutoff time for processing code blocks, prioritizing them based on sorting mechanisms, and adjusting compute resources dynamically to ensure timely completion within a fixed budget, while maintaining robustness and optimizing performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If FEC processing is performed with high reliability requirements, then communication reliability is improved, but processing time and compute resources increase
Solution Approach 1:
The patent applies partial action by implementing early termination of FEC decoding when a maximum iteration count is reached or when confidence thresholds are met. Instead of always performing complete FEC processing, the system performs only the necessary iterations to achieve acceptable reliability, thereby reducing processing time while maintaining adequate communication reliability for resource-constrained systems.
2Measurement precision
If FEC processing is performed with complete iterations, then decoding accuracy is improved, but compute power consumption increases
Solution Approach 1:
The patent implements dynamic FEC processing where the number of decoding iterations and processing depth are adjusted based on real-time conditions such as signal quality indicators (SNR, CQI), channel conditions, and resource availability. This dynamic approach allows the system to perform complete iterations when high decoding accuracy is needed while using fewer iterations when conditions permit, thereby optimizing the balance between decoding accuracy and compute power consumption.
Solution Approach 2:
The system changes processing parameters dynamically by adjusting the maximum iteration count, confidence thresholds, and processing depth based on channel conditions and resource constraints. When compute resources are abundant and channel conditions are poor, the system increases iterations for higher accuracy. When resources are constrained or channels are good, it reduces iterations to save power, thus optimizing decoding accuracy relative to compute power consumption.
3Productivity
If FEC processing is optimized for speed, then processing time is reduced, but communication reliability deteriorates
Solution Approach 1:
The system performs partial FEC processing by implementing early termination mechanisms that stop decoding when confidence thresholds are met or maximum iterations are reached. This allows the system to achieve acceptable reliability levels faster by not always performing complete processing, thus improving processing speed while maintaining adequate communication reliability for resource-constrained environments.
4Reliability
If hardware FEC encoders and decoders are implemented, then processing reliability is improved, but device complexity and cost increase
Solution Approach 1:
The patent replaces dedicated hardware FEC encoders and decoders (mechanical/system-level implementation) with software-based FEC processing running on general-purpose processors or virtualized platforms. This substitution reduces device complexity and hardware cost while maintaining acceptable processing reliability through optimized software algorithms that implement early termination and dynamic parameter adjustment.
Solution Approach 2:
The system uses general-purpose processors or virtualized compute resources that can perform multiple functions including FEC processing, other signal processing tasks, and general computation. This multi-functional approach eliminates the need for dedicated hardware FEC units, reducing device complexity while maintaining processing reliability through software implementation of FEC algorithms with dynamic optimization.
Data Source
AI summary
In one embodiment, a method for providing communication Forward Error Correction (FEC) optimization for virtualized platforms, comprising: calculating a cut off time used to terminate total FEC processing duration; processing code blocks received in a subframe in an order defined by a sorting stage; and wherein processing code blocks comprises: checking if a current time has exceeded the cut off time cut off value; when the current time has exceeded the cut off time value, then setting a Cyclic Redundancy Code (CRC) FAIL and moving onto a next code block without decoding; when the current time has not exceeded the cut off time value, then running a single iteration of decoding and checking a code block CRC; when the code block CRC is PASS then decoding is successful and moving onto a next code block; when the code block CRC is FAIL then checking if a maximum number of FEC iterations has been reached; when maximum number of FEC iterations has not been reached repeating the steps of calculating and processing code blocks; and when maximum number of FEC iterations has been reached then moving onto the next code block.