Virtualized Flash Translation Layer for Nonvolatile Memory

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Solution Overview

Problem

Existing virtualization environments face challenges in efficiently managing and accessing nonvolatile memory devices, particularly when errors occur, as they often rely on external flash translation layers that can disrupt the entire system, leading to performance degradation and reduced memory lifespan due to inefficient garbage collection.

Innovation Solution

A virtualized system with a nonvolatile memory device and processing circuitry that implements multiple virtual units and a virtual unit manager, allowing for independent flash translation layer operations within each unit, enabling normal storage access even if errors occur in some units, and optimizing unit storage regions for independent garbage collection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single external flash translation layer is used to manage the nonvolatile memory device in a virtualization environment, then the system structure is simplified, but the entire system is disrupted when errors occur and garbage collection efficiency is reduced

Engineering Contradiction:
Improvesystem structureVSAvoidsystem operation continuity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent divides the single external flash translation layer into multiple distributed flash translation layers, with each virtual unit having its own dedicated FTL. This segmentation isolates errors to individual virtual units, preventing system-wide disruption while maintaining overall system operation. The nonvolatile memory device is also divided into multiple unit storage regions, each managed by a corresponding virtual unit's FTL.

Inventive Principle:
Principle #1Segmentation

2Ease of operation

If a single external flash translation layer manages the entire nonvolatile memory device, then address management is centralized, but garbage collection frequency increases and memory lifespan decreases

Engineering Contradiction:
Improveaddress managementVSAvoidmemory device lifespan
Core Design Contradiction:
Ease of operationVSDuration of action of stationary object

Solution Approach 1:

The patent segments the garbage collection process by assigning separate flash translation layers to different virtual units, each managing its own unit storage region. This allows parallel garbage collection operations across multiple virtual units, reducing the overall frequency and overhead of garbage collection compared to a single centralized FTL managing the entire memory device.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each virtual unit's flash translation layer performs garbage collection locally within its assigned unit storage region, optimizing the collection process for specific access patterns and data characteristics of that region. This localized approach improves efficiency compared to global garbage collection across the entire memory device.

Inventive Principle:
Principle #3Local quality

3Adaptability or versatility

If external flash translation layer is used, then virtual units can operate independently, but access efficiency to nonvolatile memory device decreases

Engineering Contradiction:
Improvevirtual unit independenceVSAvoidstorage access efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent extracts the flash translation layer functionality from the external centralized position and embeds it within each virtual unit. This allows each virtual unit to independently manage its address translations and storage access operations directly, eliminating the access overhead of external FTL while maintaining virtual unit independence through the virtual unit manager.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS12124369B2Virtualized system and method of controlling access to nonvolatile memory device in virtualization environment
Publication Date: 2024.10.22 SAMSUNG ELECTRONICS CO LTD
  • US12124369B2 patent drawing
  • US12124369B2 patent drawing
  • US12124369B2 patent drawing

AI summary

A virtualized system includes a nonvolatile memory device, a processing circuitry configured to provide a virtualization environment, implement a plurality of virtual units and implement a virtual unit manager. The virtual units operate independently of each other in the virtualization environment and perform a flash translation layer operation inside the virtual units. The flash translation layer operation includes converting a logical block address associated with a storage access operation of the nonvolatile memory device to a physical block address of the nonvolatile memory device. The virtual unit manager controls the virtual units in the virtualization environment.