Virtualized I/O Device Control and Data Plane Separation
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Solution Overview
Problem
In computing systems, integrating virtualized devices with shared hardware resources into System-on-a-Chip (SoC) increases complexity and power consumption due to the need for dedicated hardware to manage control and data functions, which complicates circuitry and testing.
Innovation Solution
A method and apparatus that separate control and data functions within a virtualized device, using a processor to generate requests for control and data functions and communicate them through distinct ports, allowing for inband access and reducing the need for separate communication buses, thereby simplifying circuitry and reducing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated hardware is used to manage control and data functions in virtualized devices, then device functionality and control capability are improved, but device complexity and power consumption increase
Solution Approach 1:
The patent segments control functions and data functions into separate processing paths. Control plane traffic is handled through control registers and control logic, while data plane traffic is handled through data buffers and data processing logic. This segmentation allows each part to be optimized independently, reducing overall complexity while maintaining full functionality.
Solution Approach 2:
The patent introduces an intermediary mechanism (control and data separation logic) that mediates between the processor and the virtualized device. This intermediary routes control requests through control ports and data requests through data ports, eliminating the need for complex dedicated hardware while maintaining proper function separation.
2Reliability
If dedicated hardware is used to manage control and data functions in virtualized devices, then device control capability is improved, but power consumption increases
Solution Approach 1:
The patent merges control and data processing into a unified hardware structure with shared resources. Instead of having completely separate dedicated hardware for control and data functions, the system uses a unified device with internal logic to separate control plane and data plane operations, reducing overall power consumption while maintaining control capability.
Solution Approach 2:
The patent implements periodic or event-driven processing where control functions are activated only when control plane traffic is detected, and data functions are activated only when data plane traffic is present. This reduces power consumption by avoiding continuous operation of all hardware components.
3Reliability
If separate communication buses are used for control and data functions, then communication reliability is improved, but device complexity increases
Solution Approach 1:
The patent implements a universal communication interface that handles both control and data functions through a single communication bus. The interface uses protocol differentiation and port identification to distinguish between control plane and data plane traffic, eliminating the need for separate physical buses while maintaining communication reliability.
Solution Approach 2:
The patent creates virtual copies of communication channels through software-defined networking techniques. Instead of physical separate buses, the system creates virtual communication paths that logically separate control and data traffic while using the same physical infrastructure, reducing hardware complexity.
Data Source
AI summary
An apparatus and method for controlling a device with shared hardware resources to provide separate execution environments for control and data functions are disclosed. A processor may be configured to generate a first request to access control functions of the device in response to execution of a first thread, and generate a second request to access data functions of the device in response to execution of a second thread. A communication unit may send first indicative of the first request and second data indicative of the second request to the device via first and second ports, respectively.