Virtualized Memory Block Controller for Multi-Plane Solid State Storage
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Solution Overview
Problem
Existing methods for integrating multi-plane memory devices into computational systems are complex and labor-intensive, requiring significant development investment to adapt block management software layers for data storage and transfer protocols.
Innovation Solution
A controller with a device driver that provides a virtualized memory block representation, allowing sequential access and erasure across multiple planes, facilitating communication with block management software and data transfer protocols without requiring extensive modifications to existing systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional block management software layers are rewritten to fully implement multi-plane memory capabilities, then the memory device can simultaneously erase blocks and write pages across multiple planes, but the system complexity and development labor investment increase significantly
Solution Approach 1:
The patent introduces a translation layer that acts as an intermediary between the host system and the multi-plane memory device. This translation layer maps multi-plane memory addresses to traditional single-plane block management structures, allowing the memory device to utilize simultaneous multi-plane capabilities while presenting a familiar interface to the host system. The translation layer handles the complexity of multi-plane operations internally without requiring changes to the host's block management software.
2Adaptability or versatility
If block management layers are modified to support multi-plane devices, then multi-plane capabilities can be utilized, but considerable labor investment and development costs are consumed
Solution Approach 1:
The patent segments the complexity of multi-plane memory support into a separate translation layer component. This segmentation allows the existing block management software to remain unchanged while the translation layer handles multi-plane address mapping and operation coordination. By isolating the complexity in a dedicated component, the solution reduces development costs and makes it easier to integrate multi-plane support without modifying proven, tested block management layers.
3Reliability
If existing hardware systems use traditional block management software, then compatibility with data storage protocols is maintained, but the capabilities of multi-plane memory devices cannot be fully implemented
Solution Approach 1:
The translation layer serves as an intermediary that preserves protocol compatibility while enabling multi-plane capabilities. It translates host requests formatted for traditional single-plane memory into optimized multi-plane operations, ensuring that existing data storage protocols and block management software continue to work without modification while the underlying memory device operates at full multi-plane efficiency.
Data Source
AI summary
A computational system comprising a controller and a multi-plane solid state memory device accessible to the controller is disclosed. The controller is configured to provide access to a virtual block having a virtual block address that represents a first block from a first plane of the multi-plane solid state memory device and represents a second block from a second plane of the multi-plane solid state memory device.