Viterbi Decoder Power Gating Based on Bit Error Detection

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Solution Overview

Problem

Conventional Viterbi decoders consume constant power regardless of bit error presence, limiting power savings, and existing scarce-state-transition decoders do not effectively reduce power consumption.

Innovation Solution

A dynamic power adjusting device for Viterbi decoders that includes a processing unit to detect bit errors and a control unit to enable or disable the decoder based on error presence within a sliding window, allowing for power-saving rapid decoding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional Viterbi decoder operates continuously, then decoding reliability is maintained, but power consumption increases

Engineering Contradiction:
Improvedecoding reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The Viterbi decoder is transformed from a static continuously-operating system to a dynamic system that adapts its operation state based on real-time channel conditions. The controller dynamically switches between active decoding mode and power-saving mode according to bit error rate detection, making the system's power consumption variable rather than constant.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

A feedback mechanism is implemented where the controller continuously monitors bit error rates and uses this information to control the decoder's operation state. The detection unit provides feedback about channel quality, and the controller adjusts the decoder's power state based on this feedback, creating a closed-loop control system that optimizes power consumption while maintaining reliability.

Inventive Principle:
Principle #23Feedback

2Use of energy by moving object

If Viterbi decoder is disabled to save power, then power consumption decreases, but decoding capability is lost when errors present

Engineering Contradiction:
Improvepower consumptionVSAvoiddecoding capability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The system performs preliminary detection of bit error rates before enabling or disabling the Viterbi decoder. By detecting channel conditions in advance and predicting error presence, the controller can make informed decisions about decoder operation, avoiding unnecessary power consumption while ensuring the decoder is active when errors are likely present.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The controller acts as an intermediary between the detection unit and the Viterbi decoder. It receives detection results about bit error rates and translates them into appropriate control signals for the decoder, mediating between power-saving requirements and decoding capability needs based on real-time channel conditions.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Use of energy by moving object

If bit error detection is implemented, then power saving opportunity increases, but device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoiddevice complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The system is segmented into distinct functional modules: a detection unit for bit error detection, a controller for decision-making, and the Viterbi decoder for actual decoding. This segmentation allows each module to be optimized independently and simplifies the overall control logic, as the detection unit and controller together form a relatively simple power management subsystem that interfaces with the existing decoder.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7810019B2Dynamic power adjusting device for viterbi decoder
Publication Date: 2010.10.05 IND TECH RES INST
  • US7810019B2 patent drawing
  • US7810019B2 patent drawing
  • US7810019B2 patent drawing

AI summary

A dynamic power adjusting device for a Viterbi decoder is disclosed. The device includes a processing unit for receiving a plurality of data to be decoded, detecting whether the data to be decoded have any bit errors, and estimating a number of the bit errors of the data. The device further includes a control unit for receiving the bit errors and the number of the bit errors of the data detected by the processing unit, so as to enable the Viterbi decoder to perform decoding, and disable the Viterbi decoder after the Viterbi decoder has performed the decoding the number of times equivalent to the number of the bit errors. By way of the dynamic adjustment technique, coupled with the bit-error detection and estimation, workload of the Viterbi decoder in operation is capable of being adjusted according to bit error rate (BER) such that less power is consumed in a decoding process.