Viterbi Decoder State Initialization for Short Signal Decoding
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Solution Overview
Problem
The Viterbi algorithm's error bit rate is affected in telecommunications due to the length of the survivor path being insufficient for shorter signaling lengths, particularly in standards like legacy mode signal field (L-SIG), which has only 24 bits, leading to inadequate channel information retention.
Innovation Solution
The method involves a Viterbi decoder that performs add-compare-select operations based on known initial and final values of registers in the convolution code encoder, reducing computational complexity by selectively considering states in the trellis diagram, especially for shorter signal lengths, allowing quicker convergence to the initial state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the length of the survivor path is increased to improve error bit rate performance, then the decoding accuracy is improved, but the computational complexity and processing time increase significantly
Solution Approach 1:
The patent applies preliminary action by pre-determining the initial values of the M registers in the convolution code encoder. This allows the Viterbi decoder to start the add-compare-select operation with known initial states, eliminating the need to trace back through the entire trellis diagram from the beginning. The decoder can directly compute the survivor path using the predetermined initial values, thereby reducing the required survivor path length while maintaining decoding accuracy.
Solution Approach 2:
The patent changes the parameter of survivor path length from the conventional requirement of D ≥ 5K to a shorter length by utilizing the predetermined initial register values. This parameter change is enabled because the known initial states provide additional information that compensates for the reduced tracing back length, thus improving error bit rate performance without proportionally increasing computational complexity.
2Productivity
If the survivor path length is reduced to decrease computational complexity, then the processing speed is improved, but the error bit rate performance deteriorates
Solution Approach 1:
By performing preliminary action of determining the initial register values before decoding, the patent enables the Viterbi decoder to start with known states. This preliminary information allows the decoder to use a shorter survivor path length while maintaining sufficient channel information for accurate decoding, thus improving processing speed without sacrificing error bit rate performance.
3Adaptability or versatility
If the survivor path length is reduced to match shorter signaling lengths, then the adaptability to different signal lengths is improved, but the channel information retention becomes insufficient
Solution Approach 1:
The patent applies preliminary action by determining the initial values of the M registers before the decoding process. This preliminary determination of initial states provides the decoder with essential channel information that would otherwise be lost when using shorter survivor path lengths. As a result, the system can adapt to different signal lengths including shorter signaling lengths while retaining sufficient channel information for accurate decoding.
Data Source
AI summary
The invention discloses a method and a receiving device of the Viterbi algorithm. The method is applicable for a Viterbi decoder that receives an output signal generated by a convolution code encoder processing an original signal. The convolution code encoder includes M registers and M is a positive integer greater than or equal to 2. The method includes the following steps. First, for the first to the Mth data of the output signal, the Viterbi decoder performs the add-compare-select operation based on the known M initial values of the M registers. Then, for the Mth-last to the last data of the output signal, the Viterbi decoder performs the add-compare-select operation based on the known last M bits values of the original signal, thereby reducing the computational complexity of the add-compare-select unit.