Viterbi Traceback Index Initialization for Partial Cascade Decoding

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Solution Overview

Problem

Viterbi decoders face difficulties in initializing the traceback function correctly, especially when the cascade architecture is not an integer modulus of the constraint length, leading to suboptimal bit error rates due to improper starting indices in the traceback unit.

Innovation Solution

The implementation of reverse transpose operations and a state counter with rotated and multiplexed counter bits provides the correct starting index for the traceback unit, ensuring proper initialization and optimized bit error rates across various processing scenarios.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a cascade architecture is used to provide flexible computation for multiple constraint lengths and frame sizes, then adaptability is improved, but the traceback initialization becomes complex and error-prone when the cascade block contains a number of ACS units not an integer modulus of the cascade architecture

Engineering Contradiction:

Improveflexibility for multiple constraint lengths and frame sizesVSAvoidtraceback initialization complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary mechanism (state counter with rotation and multiplexing logic) that mediates between the cascade architecture and the traceback unit. This intermediary correctly maps the cascade block output to the appropriate traceback starting index regardless of whether the number of ACS units is an integer modulus of the cascade architecture, thereby resolving the initialization complexity while preserving cascade flexibility

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements dynamic initialization by making the traceback starting index variable rather than fixed. The state counter rotates and multiplexes based on the actual number of ACS units processed, allowing the system to adapt dynamically to different cascade configurations and constraint lengths, thus maintaining flexibility without sacrificing initialization accuracy

Inventive Principle:

Principle #15Dynamics

2Device complexity

If the traceback function is initialized with incorrect starting indices due to improper cascade architecture alignment, then device complexity is reduced, but bit error rate performance deteriorates

Engineering Contradiction:

Improveinitialization logic simplicityVSAvoidbit error rate

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The patent implements feedback by having the state counter monitor the actual number of ACS units processed and use this information to dynamically adjust the traceback starting index. This feedback mechanism ensures that even when the cascade block contains a non-integer modulus number of ACS units, the correct starting index is selected, thereby maintaining optimal bit error rate performance without requiring overly complex predetermined initialization logic

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS7617440B2Viterbi traceback initial state index initialization for partial cascade processing

Publication Date: 2009.11.10 TEXAS INSTRUMENTS INC

AI summary

This invention provides the correct Viterbi decode traceback starting index is obtained for all constraint lengths and frame sizes. Reverse transpose operations that depend on the last active add-compare-select unit a cascade block of the state metric update process. This last active add-compare-select unit controls selection of T counter signals used in the decode.