Viterbi Traceback Parallelization for Faster Decoding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing Viterbi decoders face challenges in achieving high-speed processing for high data rate decoding due to the inability to perform parallel processing techniques, leading to processing time limitations independent of hardware resources.
Innovation Solution
A Viterbi decoding processor that executes at least two backtracking steps in parallel by using both possible inputs for two processing blocks, allowing the second step to utilize the output bit of the first step, and employing a multiplexer to select between results, thereby enabling faster decoding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If sequential backtracking processing is used in Viterbi decoder, then hardware complexity is reduced, but processing time increases
Solution Approach 1:
The backtracking process is divided into multiple independent steps (first backtracking step, second backtracking step, etc.), where each step processes different survivor path metrics separately. This segmentation allows parallel execution of multiple steps without increasing overall hardware complexity, as each step uses dedicated processing blocks that can operate simultaneously.
Solution Approach 2:
The patent transitions from sequential time-based processing to parallel spatial processing by executing multiple backtracking steps simultaneously using separate processing blocks. This dimensional change from temporal to spatial processing enables faster decoding without proportionally increasing hardware resources.
2Productivity
If parallel processing is implemented in Viterbi decoder, then processing speed increases, but hardware resources increase
Solution Approach 1:
Processing blocks are segmented into specialized units (first processing block, second processing block, multiplexer) that handle specific backtracking steps. This segmentation enables parallel processing of multiple survivor path metrics simultaneously, increasing decoding speed while keeping each individual block relatively simple and resource-efficient.
Solution Approach 2:
The patent performs preliminary organization of survivor path metrics into groups corresponding to different backtracking steps before processing. This preliminary arrangement allows the parallel processing blocks to immediately access and process the required metrics without additional overhead, maximizing decoding speed while minimizing hardware resource requirements.
Data Source
Figure 1~2
Figure 3
Figure 4
AI summary
A Viterbi traceback processing method, system, and apparatus are provided wherein a first Viterbi traceback processing operation (MUX 514) is performed on a first survivor path metric (TMV1) by selecting, in response to a back track state (INDEX 0), a first output data bit (Ti1) for the first survivor path metric, wherein a plurality of Viterbi traceback processing operations (MUX 512, 513) are performed on respective portions of an additional survivor path metric (TMV2A, TMV2B) by selecting, in response to a shifted back track state (INDEX 1), candidate data bits (Tn1, Tn2) for the additional survivor path metric, wherein a multiplexer (MUX 518) controlled by the first output data bit selects between the candidate data bits to generate an additional output data bit (Ti2) for the additional survivor path metric such that the Viterbi traceback processing operations are performed in parallel to produce the output data bits.