Variable Length Decoding Buffering for Faster H.264 Coefficient Reconstruction

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Solution Overview

Problem

Conventional variable length decoding methods are inefficient due to wasteful time spent writing successive zeros, which inhibits the speedup of decoding processing, especially in H.264 coding methods where the combination of RUN and LEVEL is not decoded, leading to increased processing time and power consumption.

Innovation Solution

A variable length decoding device and method that decodes TotalCoeff, LEVEL, total_zeros, and run_before, using a write controller, address calculator, and selector to write and read data efficiently, allowing only non-zero data to be stored and read, reducing the need for a configuration based on the combination of RUN and LEVEL, thereby enabling high-speed decoding with lower power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the conventional variable length decoding method writes successive zeros using the combination of RUN and LEVEL, then the decoding can be performed with a simple configuration, but the decoding speed decreases and processing time increases

Engineering Contradiction:
Improvedecoding speedVSAvoidtime spent writing successive zeros
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent extracts and eliminates the unnecessary RUN decoding step from the conventional decoding process. By directly decoding only the LEVEL values and using an address holder to track positions, the system removes the wasteful process of decoding RUN and sequentially writing zeros, thereby improving decoding speed without sacrificing functionality

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements preliminary action by pre-calculating and storing the initial address in an address holder before the decoding process begins. This allows the system to directly jump to the correct memory positions without sequentially processing through zero coefficients, effectively performing the positioning work in advance to speed up the main decoding operation

Inventive Principle:
Principle #10Preliminary action

2Use of energy by moving object

If the conventional variable length decoding method uses the combination of RUN and LEVEL configuration, then the decoding can be performed with established methods, but power consumption increases

Engineering Contradiction:
Improvepower consumptionVSAvoidconfiguration complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent removes the RUN decoding functionality from the conventional decoder configuration. By extracting only the essential LEVEL decoding and replacing the RUN+LEVEL combination logic with a simplified address holder mechanism, the system reduces computational complexity and associated power consumption while maintaining the ability to correctly reconstruct the coefficient data

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent uses an address holder that stores and copies the initial address value throughout the decoding process. This copying mechanism replaces the need for complex RUN-based positioning logic, allowing the system to track memory positions efficiently with minimal computational overhead and lower power consumption

Inventive Principle:
Principle #26Copying

3Loss of time

If the variable length decoder processes the combination of RUN and LEVEL sequentially, then all data can be written to the data buffer, but the reading time increases

Engineering Contradiction:
Improvereading timeVSAvoiddecoding processing speed
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The patent performs preliminary action by pre-storing the initial address in the address holder before decoding begins. This allows the system to directly access and read only the necessary LEVEL values from the data buffer without sequential processing, significantly reducing reading time and improving overall decoding productivity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts and eliminates the sequential zero-writing process from the conventional method. By directly calculating and accessing memory positions using the address holder, the system reads only the essential non-zero coefficient data, reducing reading time and improving processing speed

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS7929777B2Variable length decoding device, variable length decoding method and image capturing system
Publication Date: 2011.04.19 PANASONIC SEMICON SOLUTIONS CO LTD
  • US7929777B2 patent drawing
  • US7929777B2 patent drawing
  • US7929777B2 patent drawing

AI summary

A first data buffer stores LEVEL representing the size of a non-zero coefficient value of the variable length coded/run length coded data input from the outside. A write controller writes the LEVEL to the first data buffer in decoded order. An initial address calculator calculates the initial address of the LEVEL from the TotalCoeff and the number of zero coefficients of the total_zeros. An address holder determines and holds the address of the LEVEL corresponding to data based on the initial address and the number of zero coefficients by the run_before. A read controller reads the LEVEL from the first data buffer based on the address information. A selector selects the data of either the LEVEL stored in the first data buffer or the zero coefficients based on the address information. A post-stage processor post-stage processes the data selected by the selector.