VLIW Processor Constant Extension in Execute Packets
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Solution Overview
Problem
Existing digital data processing systems face limitations in specifying large constants due to the limited number of bits available in immediate fields, which restricts the size of constants that can be embedded in instructions.
Innovation Solution
The solution involves allowing constant extension instructions to be located within the same execute packet as the instruction requiring constant extension, rather than requiring them to be adjacent, thereby providing greater flexibility in arranging instructions and extending constant bits without the need for adjacent slots.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If constant extension instructions are required to be adjacent to the instruction requiring extension, then the decoding process is simplified, but the flexibility in arranging instructions is reduced
Solution Approach 1:
The patent introduces an execute packet as an intermediary structure that groups multiple instructions together. The constant extension instruction and the target instruction are both placed within the same execute packet, allowing the decoder to identify their relationship through packet membership rather than requiring strict adjacency. This mediator structure enables flexible arrangement while maintaining decodability.
Solution Approach 2:
The patent transitions from a one-dimensional sequential instruction model to a two-dimensional structure where instructions are organized within execute packets. This allows the constant extension instruction and target instruction to be related through packet membership rather than sequential position, enabling greater flexibility in instruction arrangement while preserving the ability to identify their relationship during decoding.
2Quantity of substance
If variable length instruction words are used to specify constants, then larger constants can be specified, but more hardware resources are required for decoding
Solution Approach 1:
The patent segments the constant specification into two parts: a base constant field within the primary instruction and an extension field within a constant extension instruction. Both instructions are contained within the same execute packet. This segmentation allows the use of fixed-length instruction words while still achieving larger constant values by combining multiple fields.
Solution Approach 2:
The execute packet structure serves multiple functions: it groups instructions for parallel execution, enables constant extension through included extension instructions, and provides a framework for fixed-length decoding. This multi-functionality allows the system to achieve variable constant sizes without requiring variable-length instruction decoding hardware.
Data Source
AI summary
In a very long instruction word (VLIW) central processing unit instructions are grouped into execute packets that execute in parallel. A constant may be specified or extended by bits in a constant extension instruction in the same execute packet. If an instruction includes an indication of constant extension, the decoder employs bits of a constant extension instruction to extend the constant of an immediate field. Two or more constant extension slots are permitted in each execute packet, each extending constants for a different predetermined subset of functional unit instructions. In an alternative embodiment, more than one functional unit may have constants extended from the same constant extension instruction employing the same extended bits. A long extended constant may be formed using the extension bits of two constant extension instructions.


