Net-Specific K Factors for VLSI Timing Noise Pessimism
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Solution Overview
Problem
Existing VLSI circuit designs face inaccuracies in noise analysis due to lack of information about capacitive coupling within nets, leading to pessimistic assumptions that result in overdesign and prolonged design processes.
Innovation Solution
Determine net-specific K factors based on the characteristics of each net to provide more accurate noise estimation, reducing the need for pessimistic overcompensation and optimizing the physical design process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If pessimistic assumptions are used for noise analysis in VLSI circuit design, then reliability of timing analysis is improved, but manufacturing precision deteriorates due to overdesign
Solution Approach 1:
The patent applies local quality by determining net-specific K factors for different subnets rather than using a single global K factor. Each subnet receives a customized K factor based on its specific capacitive coupling characteristics, allowing precise noise analysis for each local region while avoiding unnecessary overdesign in other areas.
Solution Approach 2:
The patent changes the parameter approach by transitioning from fixed pessimistic K factors to dynamically determined net-specific K factors. The system calculates actual capacitive coupling values for each net and adjusts the K factor accordingly, enabling accurate noise prediction without pessimistic overcompensation.
2Reliability
If pessimistic assumptions are used for noise analysis, then reliability of timing analysis is improved, but productivity deteriorates due to prolonged design process
Solution Approach 1:
The patent applies preliminary action by pre-calculating net-specific K factors during the design phase based on actual capacitive coupling measurements. These pre-determined K factors are then stored and reused for subsequent timing analyses, eliminating the need for repeated pessimistic assumptions and iterative refinements, thus accelerating the design process while maintaining accuracy.
Solution Approach 2:
The patent enables skipping unnecessary iterative design cycles by directly using measured capacitive coupling data to determine accurate K factors. This approach rushes through the traditional multiple rounds of pessimistic analysis and revision by providing accurate noise predictions from the outset, significantly reducing design cycle time.
3Manufacturing precision
If net-specific K factors are determined, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The patent applies self-service by having the design system automatically extract capacitive coupling information from netlists and compute net-specific K factors without requiring external manual input. The system serves itself by utilizing existing design data structures and automatically performing the calculations, thereby reducing the burden on designers while achieving precise noise analysis.
Solution Approach 2:
The patent introduces an intermediary computational layer that automatically processes netlist data to generate net-specific K factors. This intermediary system acts as a bridge between the raw design data and the timing analysis tools, translating capacitive coupling information into usable K factors without requiring complex manual intervention from designers.
Data Source
AI summary
A computer implemented method includes determining a noise adjustment value for a specific subnet of a very large scale integrated (VLSI) circuit. A K factor for the specific subnet is determined based on the noise adjustment value of the specific subnet. The K factor is constant such that a timing of the specific subnet including the K factor is equal to the noise adjustment value of the specific subnet. The K factor for the specific subnet is stored in a design architecture.