Virtual Machine Fault Tolerance Framework for Space Missions

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Solution Overview

Problem

Current fault tolerance solutions for processors in space missions, such as Triple Modular Redundancy (TMR) and radiation-hardened digital integrated circuits, are expensive, inflexible, and not scalable, and do not utilize modern high-performance technologies, limiting their effectiveness and reusability.

Innovation Solution

A computer-implemented method using virtualization to execute three virtual machines on a multi-core processor, each running the same application software in isolated memory segments, with a distributed vote mechanism and safety extensions to detect and recover from faults, allowing for the use of commercial off-the-shelf processors and improving radiation tolerance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If Triple Modular Redundancy (TMR) architectures or radiation-hardened digital integrated circuits are used, then radiation fault tolerance is improved, but acquisition costs and downstream engineering costs increase significantly

Engineering Contradiction:

Improveradiation fault toleranceVSAvoidacquisition costs and engineering costs

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies virtualization to create virtual copies of computing resources instead of physical hardware copies. Three virtual machines are instantiated on a single commercial processor, each executing the same application software independently. This virtual copying approach achieves the redundancy needed for fault tolerance without the high costs of duplicating physical rad-hard hardware components.

Inventive Principle:

Principle #26Copying

Solution Approach 2:

The patent replaces the mechanical/hardware-based TMR architecture with a software-based virtualization system. Instead of using three separate physical processors with radiation-hardened circuits, the system uses a single commercial processor with multiple virtual machine instances managed by a hypervisor, substituting hardware redundancy with software abstraction.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If radiation-hardened digital integrated circuits are used, then processor fault tolerance is improved, but processing power and performance are reduced due to old technologies

Engineering Contradiction:

Improveprocessor fault toleranceVSAvoidprocessing power

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent changes the fundamental parameter of processor technology from old rad-hard circuits to modern commercial off-the-shelf (COTS) processors. By using virtualization as the fault tolerance mechanism instead of hardware design, the system can leverage the superior processing power, speed, and performance of modern semiconductor technology while maintaining radiation fault tolerance through software-based redundancy.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If Triple Modular Redundancy architectures are used, then fault tolerance is improved, but system scalability and reusability are reduced due to mission-dependant design

Engineering Contradiction:

Improvefault toleranceVSAvoidscalability and reusability

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent creates a universal fault tolerance solution that can be applied to any commercial application software on any COTS processor. The virtualization-based approach is not tied to specific mission requirements or hardware platforms, allowing the same architecture to be reused across different applications, processors, and mission types. The hypervisor and virtual machine framework provide a generic, adaptable solution that enhances versatility and scalability.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS10095601B2Triple software redundancy fault tolerant framework architecture

Publication Date: 2018.10.09 THALES SA

AI summary

A computer implemented method of detecting a fault in a system comprises the steps of executing at least three virtual machines, each virtual machine executing a same application software, in separated and isolated memory segments and in a dedicated core of a multi-core processor; the virtual machines being synchronized and concurrently executed by a common hypervisor; wherein non-faulty virtual machines provide an identical output message within a predefined time-interval; detecting a fault in an output of a virtual machine, the fault corresponding to a different output message of the faulty virtual machine. Developments include a distributed vote mechanism, pull/push mechanisms, association of output vote messages with a safety extension comprising identification information, virtual machine recovery using data context.