VM Function Cross-VCPU Notification via Hypervisor Memory
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Solution Overview
Problem
In virtualized computer systems, cross-VCPU notifications often require hypervisor exits, leading to inefficient management of CPU resources and increased power usage due to the need to interrupt other CPU tasks.
Innovation Solution
Implementing a VM function that allows direct communication with hypervisor memory without exiting the hypervisor, enabling notifications between VCPUs by determining polling status and adding requests to memory spaces associated with physical CPUs, thus reducing the need for hypervisor exits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If cross-VCPU notifications use hypervisor exits to facilitate communication, then communication between VCPUs can be achieved, but CPU resource management efficiency deteriorates and power consumption increases due to interrupting other CPU tasks
Solution Approach 1:
The patent introduces a hypervisor memory space as an intermediary medium for cross-VCPU communication. Instead of using hypervisor exits that interrupt CPU tasks, the notification mechanism writes directly to hypervisor memory, which serves as a shared communication channel between VCPUs. This eliminates the need to interrupt other CPU tasks while still enabling reliable notification delivery.
Solution Approach 2:
The patent replaces the mechanical interrupt mechanism (hypervisor exits that physically interrupt CPU execution) with a memory-based notification mechanism. By substituting the interrupt-based approach with direct memory writes to hypervisor memory, the system avoids the energy consumption and resource management overhead associated with CPU task interruptions.
2Reliability
If cross-VCPU notifications use hypervisor exits, then communication between VCPUs can be facilitated, but resource management efficiency deteriorates due to interrupting other CPU tasks
Solution Approach 1:
The hypervisor memory space acts as an intermediary that enables VCPU communication without requiring CPU task interruptions. The notification is delivered through memory writes that do not block or interrupt other CPU operations, thereby maintaining high resource management efficiency while ensuring reliable notification delivery.
Solution Approach 2:
The destination VCPU periodically polls hypervisor memory for notifications independently, without requiring the source VCPU to interrupt it. This self-service polling mechanism allows the destination VCPU to check for notifications at its own pace, eliminating the need for interrupt-driven resource management and improving overall CPU efficiency.
3Loss of energy
If direct communication with hypervisor memory is implemented without exits, then power consumption is reduced, but the complexity of managing polling status and memory spaces increases
Solution Approach 1:
The destination VCPU autonomously manages its own notification reception by polling hypervisor memory for notifications. This self-service approach distributes the polling management responsibility to individual VCPUs rather than requiring centralized control, reducing the overall system complexity while enabling direct memory communication that saves power.
Solution Approach 2:
The system pre-establishes hypervisor memory spaces and polling mechanisms before VCPU communication is needed. By preparing the memory infrastructure and polling status tracking in advance, the system reduces runtime complexity and makes the direct communication mechanism straightforward to implement and manage.
Data Source
AI summary
A hypervisor receives a notification from a source virtual machine that provides network function virtualization (NFV) support to execute a VM function component to send a request to a virtual processor. The VM function component identifies a physical processor associated with the virtual processor, and adds the request to a memory space associated with the physical processor.