User-Level VM Interrupt Posting to Cut Delivery Latency

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Solution Overview

Problem

Existing computing systems incur significant latency in delivering interrupts to user-level applications in virtual machines due to multiple privilege level transitions, leading to inefficient resource usage and increased power consumption through polling mechanisms.

Innovation Solution

Implementing user-level posted interrupts and nested posting of interrupts using an IOMMU to deliver interrupts directly to guest user applications in virtual machines, bypassing the host OS kernel and minimizing privilege level transitions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If interrupts are delivered through the host OS kernel to user-level applications in virtual machines, then the interrupt can be properly managed and routed, but significant latency is incurred due to multiple privilege level transitions

Engineering Contradiction:

Improveinterrupt managementVSAvoidinterrupt delivery latency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The interrupt delivery path is segmented into two distinct mechanisms: posted interrupts for direct user-level notification and traditional interrupts for kernel-level handling. This segmentation allows user-level applications to receive interrupt notifications without transitioning through multiple privilege levels, reducing latency while maintaining reliable interrupt management through the traditional path.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The IOMMU (Input-Output Memory Management Unit) acts as an intermediary between external devices and user-level applications. It posts interrupt notifications directly to user-level application data structures in memory, eliminating the need for privilege level transitions. The IOMMU mediates the interrupt delivery process while maintaining system security and management oversight.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If traditional interrupt delivery through host OS kernel is used, then proper interrupt handling is ensured, but resource wastage occurs through polling mechanisms

Engineering Contradiction:

Improveinterrupt handlingVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSLoss of energy

Solution Approach 1:

The system performs preliminary action by posting interrupt notifications in advance to user-level application data structures before the applications need to process them. This allows user-level applications to be notified immediately when I/O operations complete, eliminating the need for continuous polling and reducing power consumption while ensuring reliable interrupt handling.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

User-level applications can continuously perform useful work without interruption because they receive asynchronous interrupt notifications when needed. The posted interrupt mechanism ensures continuous useful action by notifying applications of I/O completion events without requiring them to poll or wait, thereby eliminating wasted computational cycles and reducing power consumption.

Inventive Principle:

Principle #20Continuity of useful action

3Reliability

If multiple privilege level transitions are performed for interrupt delivery, then proper security and management control are maintained, but interrupt delivery latency increases significantly

Engineering Contradiction:

Improvesecurity controlVSAvoidinterrupt delivery speed

Core Design Contradiction:

ReliabilityVSSpeed

Solution Approach 1:

The system segments interrupt delivery into two paths: a fast path for user-level applications that bypasses privilege level transitions, and a traditional path for kernel-level handling that maintains security control. This segmentation allows user-level applications to receive notifications at full speed while the host OS kernel maintains security oversight through the IOMMU configuration and traditional interrupt handling when needed.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The IOMMU serves as a trusted intermediary that enforces security policies without requiring privilege level transitions. It validates and routes interrupt notifications to the correct user-level applications while maintaining system security boundaries. The IOMMU mediates between the external devices and user-space applications, providing security control at the hardware level rather than through software privilege transitions.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS12498963B2User-level interrupts in virtual machines

Publication Date: 2025.12.16 INTEL CORP

AI summary

A system comprises a physical processor to execute a virtual machine manager to run, on a logical core, a virtual machine including a guest user application and a virtual CPU. Circuitry coupled to an external device is to receive an interrupt request from the external device for the guest user application, locate a first interrupt data structure associated with the guest user application, generate a first interrupt with the first interrupt data structure based on a first interrupt vector for the interrupt request, locate a second interrupt data structure associated with the virtual CPU, and generate a first notification interrupt for the virtual CPU with the second interrupt data structure based on a first notification vector in the first interrupt data structure. The circuitry may generate a second notification interrupt for the logical core using a second notification vector and a logical core identifier from the second interrupt data structure.