Virtual Machine I/O Thread Management via Idle Time Lending

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Solution Overview

Problem

Virtual processors in a host machine often enter a halt state due to waiting for I/O threads, leading to reduced performance and efficiency as allocated time is not utilized effectively, especially when I/O threads have lower priority in the processing queue.

Innovation Solution

A method involving a hypervisor that detects interrupt signals, creates a map between I/O threads and virtual processors, and moves I/O threads associated with idle virtual processors up in the processing queue, allowing the virtual processor to lend its execution time to the I/O thread, thereby increasing the efficiency of resource allocation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the scheduler allocates execution time to virtual processors, then the virtual machines can execute their tasks, but when virtual processors are in halt state waiting for I/O threads, the allocated time is wasted and host efficiency is reduced

Engineering Contradiction:
Improvevirtual machine execution efficiencyVSAvoidallocated execution time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system allows virtual processors to lend their allocated execution time to I/O threads that are stuck in lower-priority queues. The I/O threads serve themselves by executing during the virtual processor's time slice, eliminating the need for separate high-priority scheduling and resolving the timing mismatch between CPU availability and I/O readiness.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent merges the execution of I/O threads with the virtual processor's execution context. By allowing I/O threads to run during the virtual processor's allocated time slice when the virtual processor is in halt state, the system combines what were previously separate execution streams into a unified time-sharing approach, eliminating wasted allocation time.

Inventive Principle:
Principle #5Merging (Combining)

2Ease of operation

If I/O threads are executed with lower priority in the processing queue, then other high-priority tasks can be processed first, but the I/O threads experience delays causing virtual processors to wait in halt state

Engineering Contradiction:
Improveprocessing queue managementVSAvoidI/O thread completion timing
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The system dynamically adjusts the execution timing of I/O threads based on the state of virtual processors. When a virtual processor enters halt state waiting for I/O, the system dynamically schedules the I/O thread to execute during that time slice, creating a flexible, state-dependent scheduling mechanism that ensures timely I/O completion without disrupting overall queue management.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The hypervisor monitors the state of virtual processors and provides feedback to the scheduler. When a virtual processor is detected in halt state, this feedback triggers the scheduling of the associated I/O thread during the virtual processor's time slice, creating a closed-loop control system that automatically responds to processor states and ensures timely I/O execution.

Inventive Principle:
Principle #23Feedback

3Productivity

If the hypervisor creates a mapping between I/O threads and virtual processors, then the system can track and manage I/O operations more effectively, but the system complexity increases

Engineering Contradiction:
ImproveI/O thread management efficiencyVSAvoidhypervisor mapping structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The mapping structure serves multiple functions simultaneously: it tracks which I/O threads are associated with which virtual processors, enables the hypervisor to identify when virtual processors are waiting for specific I/O operations, and provides the scheduler with the information needed to dynamically adjust execution timing. This multi-functionality reduces the need for separate tracking mechanisms and minimizes overall system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9858101B2Virtual machine input/output thread management
Publication Date: 2018.01.02 RED HAT ISRAEL
  • US9858101B2 patent drawing
  • US9858101B2 patent drawing
  • US9858101B2 patent drawing

AI summary

A method performed by a physical computing system includes detecting an interrupt signal sent to a virtual processor being managed by the hypervisor, creating a map between the virtual processor and an Input/Output (I/O) thread associated with the interrupt signal, determining that the virtual processor is idle, finding the I/O thread associated with the idle virtual processor based on the map, and moving the I/O thread associated with the idle virtual processor up in a processing queue, the processing queue being for processes to be executed on a physical processor.