Virtual Machine Resource Director Technology Register Access Control

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Solution Overview

Problem

In virtualized environments, especially in Network Function Virtualization (NFV), managing and optimizing Last Level Cache (LLC) and memory bandwidth is crucial for predictable performance, but existing solutions like Intel Resource Director Technology (RDT) face challenges such as guest virtual machines lacking root-level privilege, leading to inefficient resource sharing and potential performance degradation due to vmexit latency and lack of monitoring.

Innovation Solution

A system that allows guest virtual machines to directly access and manage RDT registers using MSR bitmaps without triggering vmexit, enabling efficient resource allocation and monitoring through a Virtual Machine Monitor (VMM), thereby reducing latency and improving resource utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If guest virtual machines are allowed to directly access RDT registers using MSR bitmaps, then resource allocation efficiency and performance predictability improve, but system security and resource control may be compromised

Engineering Contradiction:
Improveresource allocation efficiencyVSAvoidsystem security
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces an intermediary mechanism where the VMM configures MSR bitmaps to control which RDT registers are accessible by guest VMs. This intermediary layer maintains security by selectively enabling access only to specific registers that guests are authorized to access, while preventing access to critical system registers. The MSR bitmap acts as a filter between the guest VM and the full RDT register space, resolving the contradiction between direct access efficiency and system security.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If VMM uses vmexit and vmenter sequence for each RDT register access, then resource allocation control is improved, but access latency increases

Engineering Contradiction:
Improveresource allocation controlVSAvoidaccess latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by having the VMM configure MSR bitmaps in advance to define which RDT registers are accessible by guest VMs. This pre-configuration establishes access rules before the VM executes, allowing subsequent register accesses to proceed without repeated vmexit/vmenter cycles. The MSR bitmap is set up once during VM initialization or resource allocation, enabling fast direct access while maintaining VMM-controlled resource allocation policies.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If RDT registers are accessed through API calls into VMM, then resource monitoring and control are improved, but system performance degrades due to OS stalling

Engineering Contradiction:
Improveresource monitoringVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the resource monitoring and control functionality directly into the guest VM's accessible register space through MSR bitmaps. Instead of requiring API calls to the VMM for every monitoring operation, the essential RDT register access capability is extracted and made directly available to the guest OS scheduler. This allows the guest OS to monitor and control RDT resources without stalling, while the VMM retains overall control through the MSR bitmap configuration.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20210117244A1Resource manager access control
Publication Date: 2021.04.22 INTEL CORP
  • US20210117244A1 patent drawing
  • US20210117244A1 patent drawing
  • US20210117244A1 patent drawing

AI summary

Examples provide a system that includes one or more processors, that when operational, are to: based on content in a request being within a permitted range for a virtualized execution environment, transfer the request from the virtualized execution environment to reserve one or more device resources independent from causing a virtual machine exit to request to reserve one or more device resources. In some examples, the transfer comprises a write to a register. In some examples, processor-executed microcode is to determine whether content in the request is within a permitted range for the virtualized execution environment.