Switched Mode Voltage Regulator Startup Overshoot Control

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Solution Overview

Problem

Switched mode voltage regulators often experience fast ramp rates and overshoot during power-up, leading to issues like electrostatic discharge and overvoltage conditions, which can cause reliability problems.

Innovation Solution

A switched mode voltage regulator with a compensator that adjusts its RC time constant during start-up to slow down the ramp rate, using a filter with increased resistance to control the PWM duty cycle and prevent overshoot, and includes a voltage clamp to ensure the output does not exceed a certain level.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the voltage regulator uses a standard RC time constant during start-up, then the circuit responds quickly, but the ramp rate becomes too fast causing ESD protection triggering and reset

Engineering Contradiction:
Improveramp rateVSAvoidpower-up stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies dynamics by making the RC time constant adjustable rather than fixed. During start-up, a first (larger) RC time constant is used to slow the ramp rate and prevent ESD triggering. After start-up completes, a second (smaller) RC time constant is used for normal operation. This dynamic adjustment resolves the contradiction between fast response and reliable power-up.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter values of the RC time constant based on operational phase. By switching between different resistance values (R1 during start-up, R2 during normal operation) while maintaining the same capacitor, the system achieves different time constants to satisfy different operational requirements - slow ramp during start-up for reliability, faster response during normal operation for performance.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the voltage regulator allows fast ramp-up, then power delivery is efficient, but overshoot occurs causing overvoltage conditions and reliability problems

Engineering Contradiction:
Improvepower delivery efficiencyVSAvoidovervoltage protection
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-charging the capacitor through a higher resistance value during the start-up phase before normal operation begins. This preliminary slow ramp-up prevents overshoot from occurring in the first place, eliminating the need for corrective actions and ensuring reliable power delivery without overvoltage conditions.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dynamic switching between different RC time constants allows the system to optimize for different phases: a larger time constant during start-up to prevent overshoot and ensure reliability, then switching to a smaller time constant during normal operation to improve power delivery efficiency and productivity.

Inventive Principle:
Principle #15Dynamics

3Reliability

If the RC time constant is increased during start-up, then the ramp rate is reduced for stable power-up, but the response time during normal operation becomes slower

Engineering Contradiction:
Improvestart-up stabilityVSAvoidresponse time
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent resolves this contradiction through dynamic parameter adjustment - using a first RC time constant (with higher resistance) during start-up to ensure stability and prevent ESD triggering, then switching to a second RC time constant (with lower resistance) during normal operation to achieve faster response time. The system adapts its time constant based on operational phase requirements.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system employs periodic action by switching between different operational modes with different RC time constants. The start-up mode with slower response is applied only during the initial power-up period, then transitions to the normal operation mode with faster response, allowing the system to optimize for reliability when needed and performance when stable.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively reduces the risk of fast ramp rates and overshoot, ensuring stable power-up and long-term reliability by allowing a slower ramp-up of the output voltage and preventing overvoltage conditions.

Implementation Method 1

the filter circuit has a first resistor-capacitor (RC) time constant during startup of the voltage regulator, and the filter circuit has a second RC time constant during normal operation

Methodology Applied
Scientific EffectRC time constant: Capacitance

Data Source

PatentUS8552700B2Switched mode voltage regulator and method of operation
Publication Date: 2013.10.08 NXP USA INC
  • US8552700B2 patent drawing
  • US8552700B2 patent drawing
  • US8552700B2 patent drawing

AI summary

A voltage regulator includes a transistor, a comparator, and a compensation circuit. The comparator has a first input terminal coupled to receive a clock signal, a second input terminal, and an output terminal coupled to a control electrode of the transistor. The compensation circuit has a first input terminal coupled to receive a reference voltage, a second input terminal coupled to the output terminal of the voltage regulator, and an output terminal coupled to the second input terminal of the comparator. The compensation circuit has a filter circuit. The filter circuit has a first RC time constant during startup of the voltage regulator, and the filter circuit has a second RC time constant during normal operation. Changing the RC time constant for startup prevents an overshoot of an output voltage of the voltage regulator.