Void-Free Isolation Gate Structure for Semiconductor Devices
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Solution Overview
Problem
As semiconductor devices continue to scale, it becomes increasingly difficult to fill trenches and openings with deposited materials, leading to the formation of voids in gate structures, which can compromise device isolation and allow processing chemicals to pass between adjacent devices, potentially damaging unprotected regions.
Innovation Solution
The method involves forming a replacement gate structure with a sacrificial gate conductor and dielectric cap layer, where the bump portion and underlying sacrificial gate conductor are removed to create an isolation gate opening with a tapered width, ensuring a void-free gate structure over the isolation region, thereby preventing the transmission of processing chemicals between devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional planar FET scaling is continued, then device density increases, but void formation occurs in gate structures compromising device isolation
Solution Approach 1:
The gate structure is segmented into multiple sections: functional gate portions over the device channels and an isolation gate portion over the isolation region. This segmentation allows the isolation gate to be specifically designed with a void-free structure to prevent chemical transmission, while functional gates maintain standard design for device operation. The isolation gate acts as a barrier segment that divides and contains processing chemicals between adjacent devices.
Solution Approach 2:
The isolation gate structure serves as an intermediary element between adjacent functional gates and devices. It is positioned over the isolation region and acts as a mediator that blocks the transmission of processing chemicals while allowing the functional gates to perform their switching functions. The isolation gate mediates the isolation requirement without interfering with device operation.
2Length of moving object
If trench width is reduced for scaling, then device dimensions shrink, but material deposition becomes difficult leading to void formation
Solution Approach 1:
Different regions of the gate structure have different quality requirements. The functional gate portions require standard deposition quality for electrical function, while the isolation gate portion requires enhanced quality to be completely void-free. The method applies local quality control by using a broader isolation gate opening that allows complete material deposition, while functional gate openings maintain their required dimensions for device operation.
Solution Approach 2:
The isolation gate opening is designed with different dimensional characteristics than functional gate openings. It has a broader width dimension that facilitates complete material deposition without voids, while functional gate openings have narrower dimensions optimized for device scaling. This dimensional differentiation resolves the contradiction between small size and complete filling.
3Productivity
If gate structure is made narrower for device scaling, then device density improves, but processing chemical transmission between devices increases
Solution Approach 1:
The isolation gate function is extracted as a separate, dedicated structure positioned over the isolation region between devices. Instead of relying solely on the narrowness of functional gates to prevent chemical transmission, the method extracts the isolation function into a separate structural element that is specifically designed and optimized for blocking chemical pathways while functional gates focus on electrical operation.
Data Source
AI summary
A semiconductor device that includes a first fin structure in a first portion of a substrate, and a second fin structure in a second portion of the substrate, wherein the first portion of the substrate is separated from the second portion of the substrate by at least one isolation region. A gate structure present extending from the first fin structure across the isolation region to the second fin structure. The gate structure including a first portion on the first fin structure including a first work function metal having at least one void, an isolation portion that is voidless present overlying the isolation region, and a second portion on the second fin structure including a second work function metal.