Void-Free Conductive Trench Filling by Cyclic Deposition and Removal
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Solution Overview
Problem
As semiconductor device geometries shrink, high aspect ratio trenches in semiconductor devices often result in void formation during conductive material deposition, leading to increased resistance and reduced performance due to the limitations of one-step deposition methods.
Innovation Solution
A cyclic process involving alternating deposition and removal steps is employed to fill trenches with conductive material, where the deposition step is terminated before the trench is blocked, and the removal step trims overhangs to prevent voids, ensuring a void-free fill.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If one-step deposition method is used to fill trenches, then the process is simple and fast, but voids form in high aspect ratio trenches leading to increased resistance
Solution Approach 1:
The deposition process is segmented into multiple cycles, each consisting of a deposition step followed by a removal step. This segmentation allows the conductive material to be deposited in controlled increments, preventing void formation in high aspect ratio trenches while maintaining overall process efficiency. The cyclic approach divides the single-step deposition into manageable stages that can be precisely controlled.
Solution Approach 2:
The patent employs periodic action through cyclic deposition and removal steps. The deposition step is periodically interrupted by a removal step that eliminates overhangs formed during deposition. This periodic cycle repeats until the trench is fully filled, ensuring that voids do not form while maintaining a systematic and controllable process rhythm.
2Manufacturing precision
If deposition continues until trench is blocked, then fill is complete, but overhangs form causing voids
Solution Approach 1:
The removal step is performed as a preliminary action before the trench becomes completely blocked. By removing overhangs during the cyclic process rather than allowing them to accumulate, the method prevents the formation of voids that would occur if deposition continued uninterrupted. This preliminary removal action ensures the trench remains open for complete filling.
Solution Approach 2:
The patent converts the harmful effect of overhang formation into a beneficial process feature. Instead of viewing overhangs as defects to be avoided, the method utilizes their controlled formation during deposition as a signal to perform the removal step. The overhangs are intentionally allowed to form temporarily, then removed in the next cycle, transforming what would be a harmful accumulation into a controlled intermediate state that enables complete trench filling.
3Productivity
If device size is reduced to increase capacity, then more memory cells fit on chip, but performance suffers
Solution Approach 1:
The patent addresses the performance issue arising from reduced device sizes by changing the deposition parameters. Instead of using conventional one-step deposition, the method employs cyclic deposition with controlled thickness accumulation. This parameter change allows trenches in smaller, high-density memory cells to be filled completely without voids, maintaining electrical performance despite reduced device dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively prevents void formation in high aspect ratio trenches, maintaining electrical effectiveness and performance by ensuring conductive features are filled without interruptions, enhancing the semiconductor device's functionality.
Implementation Method 1
a deposition step and a removal step to deposit a conductive material in the trench
Implementation Method 2
a deposition step and a removal step to deposit a conductive material in the trench
Implementation Method 3
the removal step removes the conductive material isotropically from the trench
Data Source
AI summary
The present application provides a method of fabricating a semiconductor device. The method includes steps of forming a transistor in a substrate; depositing an insulative layer on the substrate; forming a first trench penetrating through the insulative layer to expose a portion of a first impurity region of the transistor; performing a first cyclic process comprising a first sequence of a first deposition step and a first removal step to deposit a conductive material in the first trench until a height of the conductive material in the first trench exceeds a predetermined height; filling the first trench with the conductive material after the first cyclic process; forming a storage capacitor contacting the first conductive feature; and depositing an isolation layer to cover the insulative layer and the storage capacitor.