Volatile Memory Data Transfer to Non-Volatile Auxiliary Array

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Solution Overview

Problem

Memory systems with volatile storage architectures face inefficiencies in reduced power modes due to high power consumption from refresh operations, limiting their performance during idle or standby modes.

Innovation Solution

Transferring processing information from a volatile memory array to a non-volatile auxiliary array before entering reduced power modes, and returning it upon exiting, thereby reducing the need for refresh operations and minimizing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If volatile memory array is used for storing processing information, then fast access speed is achieved, but high power consumption occurs during reduced power modes due to refresh operations

Engineering Contradiction:
Improveaccess speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent divides the memory storage function into two separate memory arrays: a volatile memory array for fast access during active modes and a non-volatile auxiliary memory array for data retention during reduced power modes. This segmentation allows the system to optimize for speed when needed while minimizing power consumption during idle periods by transferring data between the two arrays based on operational state.

Inventive Principle:
Principle #1Segmentation

2Reliability

If refresh operations are performed on volatile memory, then data retention is maintained, but system efficiency decreases during idle or standby modes

Engineering Contradiction:
Improvedata retentionVSAvoidsystem efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the data retention function from the volatile memory array during reduced power modes by transferring processing information to the non-volatile auxiliary memory array. This extraction eliminates the need for continuous refresh operations on the volatile memory, thereby maintaining data reliability while significantly improving system efficiency during idle or standby modes.

Inventive Principle:
Principle #2Taking out (Extraction)

3Speed

If volatile memory is used during reduced power modes, then fast access is maintained, but power consumption increases due to mandatory refresh cycles

Engineering Contradiction:
Improveaccess speedVSAvoidenergy loss
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The patent performs preliminary action by transferring processing information from the volatile memory array to the non-volatile auxiliary memory array before the system enters reduced power mode. This advance data transfer ensures that when the system wakes up, the data is already preserved in the auxiliary array, eliminating the need for energy-consuming refresh operations during the low-power period while maintaining the ability to quickly restore operations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11748005B2Transferring memory system data to an auxiliary array
Publication Date: 2023.09.05 MICRON TECHNOLOGY INC
  • US11748005B2 patent drawing
  • US11748005B2 patent drawing
  • US11748005B2 patent drawing

AI summary

Methods, systems, and devices for transferring memory system data to an auxiliary array are described. A memory system may be configured for transferring information between a relatively volatile memory array and a relatively non-volatile memory array in response to transitions between various operating modes, such as operating modes associated with different operating power levels. For example, before entering a reduced power mode, the memory system may identify information stored in a volatile memory array and transfer the identified information to an auxiliary, non-volatile memory array. Such information may be returned to the relatively volatile memory array to support memory system operation after exiting the reduced power mode. In some examples, such information exchanged between the memory system and the host system may be associated with a processing capability of the memory system, and the described operations may be referred to as suspending memory system processing information to an auxiliary array.