Volatile Memory Exception Handling for Secure Program Execution

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Solution Overview

Problem

Existing solutions for protecting program execution sequencing against unauthorized modifications and fault injections, such as injection attacks, are inefficient in terms of memory usage and require additional hardware or time for signature calculations.

Innovation Solution

A method involving a volatile memory area filled with exception-processing instructions, which are replaced by valid instructions before program execution, allowing for dynamic control and validation of program sequencing without predefining jump addresses, utilizing a non-volatile memory for storing the program and a volatile memory for execution control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If signature calculation is used to protect program execution sequencing, then security against fault injection attacks is improved, but execution time and hardware requirements increase

Engineering Contradiction:
ImprovesecurityVSAvoidexecution time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent pre-calculates and stores all possible jump addresses in a lookup table during program design, rather than calculating signatures during execution. This preliminary preparation eliminates runtime computational overhead while maintaining security verification capabilities.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates a copy of the program's control flow information in the form of a lookup table containing all valid jump addresses. This copy allows for constant-time verification by simple table lookup instead of complex signature calculations, significantly reducing execution time while preserving security.

Inventive Principle:
Principle #26Copying

2Reliability

If signature calculation is used to protect program execution sequencing, then security against fault injection attacks is improved, but hardware complexity increases

Engineering Contradiction:
ImprovesecurityVSAvoidhardware requirements
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces complex signature calculation hardware with a simple lookup table stored in memory. The verification mechanism becomes a basic memory read and comparison operation, dramatically reducing hardware complexity while maintaining security functionality.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent replaces the mechanical/computational system of signature calculation with a data-driven approach using pre-stored jump address information. This substitution eliminates the need for complex computational hardware and replaces it with simple memory access and comparison logic.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Adaptability or versatility

If conditional jumps are used for program control, then program flexibility is improved, but vulnerability to injection attacks increases

Engineering Contradiction:
Improveprogram flexibilityVSAvoidvulnerability to injection attacks
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent implements a feedback mechanism where each conditional jump is verified against the pre-stored lookup table to ensure the target address is valid. This feedback loop detects and prevents unauthorized jumps caused by fault injection attacks while preserving legitimate program flexibility.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent prepares countermeasures in advance by storing all valid jump addresses in the lookup table before program execution. This preliminary anti-action enables the system to immediately reject unauthorized jumps during execution without compromising program flexibility or requiring complex real-time analysis.

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS8190909B2Protection of the execution of a program
Publication Date: 2012.05.29 STMICROELECTRONICS FRANCE
  • US8190909B2 patent drawing
  • US8190909B2 patent drawing
  • US8190909B2 patent drawing

AI summary

A method for controlling the execution of at least one program in an electronic circuit and a processor for executing a program, in which at least one volatile memory area of the circuit is, prior to the execution of the program to be controlled, filled with first instructions resulting in an exception processing; the program contains instructions for replacing all or part of the first instructions with second valid instructions; and the area is called for execution of all or part of the instruction that it contains at the end of the execution of the instruction program.