Volatile Memory Sharing in Data Storage Power-Save Modes

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Solution Overview

Problem

Current data storage devices for portable electronic devices lack efficient sharing of working memory with host devices, leading to suboptimal performance during power-save modes.

Innovation Solution

A data processing system comprising a host device with a first volatile memory and a data storage device that includes a second volatile memory and a nonvolatile memory, where the data storage device uploads data from its second volatile memory to the host device's first volatile memory before entering power-save mode, utilizing a controller and an access block to manage data transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the data storage device uses its own volatile memory device for working memory, then it can operate independently, but the host device cannot access this memory directly leading to performance loss during power-save mode

Engineering Contradiction:
Improvedata access speedVSAvoidmemory sharing mechanism
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges the volatile memory resources of the data storage device with the host device's memory space by mapping the volatile memory device to a unified memory region accessible by both devices. This allows the host device to directly access working data in the volatile memory during power-save mode, eliminating data transfer delays while maintaining independent operation capabilities.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The volatile memory device serves dual functions: it acts as working memory for the data storage device's controller and simultaneously as shared memory accessible by the host device. This multi-functionality is achieved through the unified region access block that enables both devices to access the same memory space according to their respective needs.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Loss of energy

If the data storage device enters power-save mode quickly, then power consumption is reduced, but data in volatile memory may be lost

Engineering Contradiction:
Improvepower consumptionVSAvoiddata integrity
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

Before the data storage device enters power-save mode, the system performs preliminary actions by uploading critical working data from the volatile memory device to the host device's memory or nonvolatile storage. This ensures data is preserved before power is reduced, while still allowing the device to enter low-power state efficiently.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The host device acts as an intermediary that receives and stores data from the volatile memory device before the data storage device enters power-save mode. This intermediary mechanism ensures data integrity is maintained while allowing the storage device to conserve power, as the host device preserves the data during the low-power period.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of operation

If the volatile memory device is dedicated to the data storage device, then control is simplified, but the host device must copy data increasing transfer time

Engineering Contradiction:
Improvecontrol simplicityVSAvoiddata transfer time
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent combines the memory spaces of the data storage device and host device into a unified memory region, eliminating the need for data copying between separate memory spaces. The unified region access block enables direct access to the volatile memory device from the host device, reducing data transfer time while maintaining coordinated control through shared memory management.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9501130B2Data storage device and data processing system including the same
Publication Date: 2016.11.22 SK HYNIX INC
  • US9501130B2 patent drawing
  • US9501130B2 patent drawing
  • US9501130B2 patent drawing

AI summary

A data processing system includes a host device including a first volatile memory device, and a data storage device including a second volatile memory device and a nonvolatile memory device, and suitable for storing data to be accessed by the host device. The data storage device uploads data stored in the second volatile memory device to the first volatile memory device before the data storage device in a normal mode enters a power-save mode.