Volatile Memory Circuit for Contactless Transponder Data Exchange
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Solution Overview
Problem
Current contactless transponders, such as NFC transponders, face limitations in data transfer rate and memory capacity, leading to slow data exchange and latency issues due to their physical memory constraints, which restrict the size and speed of data frames that can be transferred between a microcontroller and a contactless reader.
Innovation Solution
Implementing a method that uses a volatile memory circuit accessible simultaneously to both the processing circuit and the microcontroller, allowing for temporary storage and emulation of a virtual memory with larger capacity, enabling faster data exchange without impacting overall transfer rates by alternately swapping memory roles for continuous write operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If physical memory is used for data transfer between contactless interface and microcontroller, then data storage is possible, but data transfer rate is limited and latency occurs
Solution Approach 1:
The physical memory is divided into two separate buffers: a first buffer for the processing circuit and a second buffer for the microcontroller. This segmentation allows simultaneous read and write operations to occur in parallel, eliminating the sequential access bottleneck that causes latency and limiting data transfer rate.
Solution Approach 2:
The patent transitions from a single-dimension sequential memory access model to a two-dimension parallel access model by introducing dual buffers. This dimensional change enables the system to bypass the inherent latency of sequential access by operating in multiple access dimensions simultaneously.
2Quantity of substance
If physical memory capacity is increased to store larger data frames, then more data can be transferred, but memory size and cost increase
Solution Approach 1:
The patent implements dynamic buffer switching where the processing circuit and microcontroller alternately use the first and second buffers. This dynamic allocation allows the system to effectively double the usable memory capacity without physically doubling the memory hardware, as each buffer can be independently managed and switched between operations.
Solution Approach 2:
The system changes the operational parameters of the memory by introducing dual buffering with independent read/write pointers. This parameter change enables the same physical memory resources to support larger effective data frame sizes through parallel processing and alternating buffer usage.
3Productivity
If sequential access to memory is used, then simple memory architecture is maintained, but data exchange speed is reduced
Solution Approach 1:
The memory system is segmented into two independently accessible buffers, each with its own access interface. This segmentation transforms the single sequential access path into two parallel access paths, doubling the effective data exchange speed while maintaining relatively simple buffer management logic.
Data Source
AI summary
A first communication interface is a contactless communication interface for an integrated circuit. A second communication interface is coupled to a processing unit external to the integrated circuit. The transfer of data between the first communication interface and the second communication interface is made in a transfer mode using a volatile memory circuit. The volatile memory circuit is accessible simultaneously or virtually simultaneously firstly to processing circuit coupled to said first communication interface and secondly to said processing unit via said second communication interface.