Volatile Memory Voltage Adjustment via Boot Margin Testing
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Solution Overview
Problem
Existing electronic devices are unable to efficiently test and adjust the lower positive supply voltage (LVDD) for volatile memory, leading to potential power efficiency deterioration due to process spread and varying voltage characteristics among devices.
Innovation Solution
An electronic device is designed to test the LVDD margin during booting, identifying whether the system is in initial booting or if a designated condition in the volatile memory is met, and then drives the volatile memory using a new LVDD value appropriate for the device, rather than relying on a reference LVDD value.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a reference LVDD value is used for all electronic devices of the same type, then the device complexity is reduced and ease of manufacture is improved, but the power efficiency deteriorates due to process spread and varying voltage characteristics
Solution Approach 1:
The patent performs LVDD margin testing during the booting process to preliminarily identify the appropriate LVDD value for each device before normal operation begins. This preliminary characterization allows the system to store and use device-specific LVDD values, resolving the contradiction by enabling customized voltage settings without requiring complex manufacturing processes.
Solution Approach 2:
The patent changes the LVDD parameter from a fixed reference value to a dynamically determined value based on individual device characteristics. By testing different LVDD values during booting and selecting the optimal value for each device, the system achieves both ease of manufacture (using standardized testing procedures) and improved power efficiency (through device-specific optimization).
2Use of energy by moving object
If LVDD margin testing is performed during booting, then the power efficiency is improved through device-specific LVDD optimization, but the booting time and processing complexity increase
Solution Approach 1:
The LVDD margin testing is performed as a preliminary action during the booting process, before the system enters normal operation. By completing the voltage characterization early and storing the results for future use, the patent minimizes the time impact on subsequent operations while achieving power efficiency optimization.
Solution Approach 2:
The patent implements a conditional testing approach where LVDD margin testing is performed only when needed (e.g., during initial booting or when specific conditions are met), rather than every time the system starts. This partial action reduces the average time loss while still achieving the power efficiency benefits for each device.
Data Source
AI summary
An electronic device includes a power management circuit; a volatile memory; and a processor configured to: based on the electronic device starting system booting, identify whether the system booting is initial booting or whether a condition designated in the volatile memory is satisfied, based on identifying that the system booting is the initial booting or the condition is satisfied, identify a lower positive supply voltage (LVDD) value for the volatile memory by testing an LVDD margin for the volatile memory, and based on the LVDD value being less than a reference LVDD value for the volatile memory, drive the volatile memory using the LVDD value.