Volatile State Retention Circuit Using High Voltage CMOS Backup

Solution Overview

Problem

Modern CMOS memory circuits with lower voltage operation exhibit high leakage currents during power-down periods, making it challenging to maintain volatile data states effectively, as previous solutions involving analog techniques are complex and ineffective.

Innovation Solution

A digital approach is employed where non-critical circuitry is powered off in low power mode, and the least leaky high voltage circuitry is used for backup, utilizing larger geometry CMOS transistors with higher voltage operation to minimize leakage currents, and incorporating high voltage flip-flop circuits for state retention during power-down.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If smaller geometry CMOS circuits are used for lower voltage operation, then power consumption during operation is reduced, but leakage current during power-down increases significantly

Engineering Contradiction:

Improvepower consumption during operationVSAvoidleakage current during power-down

Core Design Contradiction:

Use of energy by moving objectVSLoss of energy

Solution Approach 1:

The circuit is divided into two separate parts: a low voltage CMOS circuit for normal operation and a high voltage backup circuit for power-down state retention. This segmentation allows each part to operate under its optimal voltage conditions, with the backup circuit powered by a separate high voltage source that remains active during power-down periods to maintain state without significant leakage.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

A high voltage backup circuit acts as an intermediary between the low voltage operational circuit and the power supply. This backup circuit receives power from a separate high voltage source and provides a low leakage path to maintain volatile states during power-down, effectively mediating between the conflicting requirements of low operation power and low leakage during standby.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Loss of energy

If analog techniques are used to reduce leakage current, then standby current is reduced, but circuit complexity increases

Engineering Contradiction:

Improvestandby currentVSAvoidcircuit complexity

Core Design Contradiction:

Loss of energyVSDevice complexity

Solution Approach 1:

The patent replaces complex analog circuit techniques with a simpler digital approach using high voltage CMOS logic. Instead of using analog feedback mechanisms or complex transistor-level adjustments to reduce leakage, the solution uses the inherent properties of high voltage CMOS circuits to provide low leakage paths during power-down, significantly simplifying the overall circuit design.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Loss of energy

If high voltage transistors with larger geometry are used for backup, then leakage current is reduced, but voltage compatibility with low voltage circuits becomes problematic

Engineering Contradiction:

Improveleakage currentVSAvoidvoltage compatibility

Core Design Contradiction:

Loss of energyVSAdaptability or versatility

Solution Approach 1:

The circuit is divided into two separate parts: a low voltage CMOS circuit for normal operation and a high voltage backup circuit for power-down state retention. This segmentation allows each part to operate under its optimal voltage conditions, with the backup circuit powered by a separate high voltage source that remains active during power-down periods to maintain state without significant leakage.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

A high voltage backup circuit acts as an intermediary between the low voltage operational circuit and the power supply. This backup circuit receives power from a separate high voltage source and provides a low leakage path to maintain volatile states during power-down, effectively mediating between the conflicting requirements of low operation power and low leakage during standby.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS7729193B2Backup for volatile state retention in the absence of primary circuit power

Publication Date: 2010.06.01 MAXIM INTEGRATED PROD INC

AI summary

A backup volatile state retention circuit is provided with low leakage current for employment with a volatile memory circuit to store the value of the latter during power down of the volatile circuit or during power-down or inactivation of neighboring or peripheral circuits or due to the loss of power of any of these circuits. An example of such a volatile circuit is a memory circuit having volatile memory cells such as employed in dynamic memory core, in particular, a random access memory (RAM) in CMOS circuitry.