Voltage-Based Time-to-Digital Conversion for Phase Offset Sampling
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Solution Overview
Problem
Conventional time-to-digital converters (TDCs) face challenges in achieving high-speed phase offset sampling with low power consumption, small circuit area, and good linearity, especially in applications like 5G systems and clock distribution systems.
Innovation Solution
A time-to-digital conversion system that uses voltage as a representation of time offset, employing a time-to-voltage converter circuit and a voltage measurement circuit, with an integrate-and-dump circuit and analog-to-digital converter, to map voltage measurements to digital time values, enabling high-speed phase offset sampling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional delay line based TDCs are used, then time difference measurement is achieved, but power consumption is high and circuit area is large
Solution Approach 1:
The patent replaces the mechanical delay line structure with an electrical voltage-based measurement system. Instead of using physical signal propagation through delay elements, the invention converts time difference directly to voltage difference through current integration, eliminating the need for complex delay line circuits and reducing both power consumption and circuit area.
Solution Approach 2:
The patent changes the measurement parameter from time domain (delay line traversal time) to voltage domain (integrated current voltage). By integrating current over the time difference period, the system converts temporal information into voltage magnitude, enabling measurement with simpler, lower-power circuitry while maintaining accuracy.
2Area of stationary object
If conventional delay line based TDCs are used, then time difference measurement is achieved, but circuit area is large
Solution Approach 1:
The patent replaces the mechanical delay line structure with an electrical voltage-based measurement system. Instead of using physical signal propagation through delay elements, the invention converts time difference directly to voltage difference through current integration, eliminating the need for complex delay line circuits and reducing both power consumption and circuit area.
3Use of energy by moving object
If voltage-based time-to-digital conversion is used, then power consumption is reduced and circuit area is smaller, but measurement precision must be maintained
Solution Approach 1:
The patent changes the measurement parameter from time domain (delay line traversal time) to voltage domain (integrated current voltage). By integrating current over the time difference period, the system converts temporal information into voltage magnitude, enabling measurement with simpler, lower-power circuitry while maintaining accuracy.
Solution Approach 2:
The patent employs calibration circuitry that measures the relationship between voltage differences and known time differences, storing calibration data that compensates for non-linearities and environmental variations. This feedback mechanism ensures measurement precision is maintained despite the simplified voltage-based architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides high-speed phase offset sampling with lower power consumption, smaller circuit area, and better noise performance compared to conventional delay line based TDCs, suitable for applications in 5G systems and clock distribution systems.
Implementation Method 1
a capacitive circuit (e.g., a capacitor, a capacitor network, or an integrate-and-dump circuit) coupled to the controllable current source and configured to store voltage based on the current output flow from the controllable current source
Implementation Method 2
an integrate-and-dump circuit configured to begin integrating on the start signal and to stop integrating on the stop signal
Data Source
AI summary
A time-to-digital converter (TDC) uses voltage as a representation of time offset. A voltage change is induced over a time period from a start signal to a stop signal. The final voltage is then measured, and the voltage measurement is mapped to a time value representing the time between the start signal and the stop signal. The voltage change can be increasing or decreasing, e.g., by charging or discharging a capacitive circuit between the start signal and the stop signal. The voltage can be measured using an analog-to-digital converter (ADC) or other voltage measurement circuit. The voltage measurement can be mapped to the time value in any manner, such as, for example, using a transfer function or using a mapping table that provides a time value for each possible voltage measurement value.


