Voltage Bin Selection for Memory Blocks After Power Up

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Solution Overview

Problem

Existing memory sub-systems fail to adequately address temporal voltage shift due to slow charge loss, leading to increased bit error rates, and often employ inefficient strategies that result in performance penalties during power-up operations.

Innovation Solution

The implementation of a memory sub-system that employs read threshold voltage bins and assigns each block a voltage bin based on time after programming, with techniques to quickly estimate the power-off duration to update voltage bin assignments, minimizing the need for scanning every block after power-on.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If voltage bin assignments are updated by scanning every block after power-on, then accuracy of voltage bin selection is improved, but performance overhead increases and power-on process speed decreases

Engineering Contradiction:
Improvevoltage bin selection accuracyVSAvoidpower-on process speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The system performs voltage bin assignment during the normal operation phase before power-off, storing the assigned voltage bin information in metadata. Upon power-on, this pre-computed information is retrieved instead of re-scanning, thus preparing the data in advance to avoid time-consuming operations during power-on sequence.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts only the necessary voltage bin assignment information from the full block scanning process and stores it separately in metadata structures. This extracted information can be quickly retrieved without needing to re-scan the entire memory device, separating the essential data from the comprehensive verification process.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If voltage bin assignments are updated by scanning every block after power-on, then reliability of data reading is improved, but time consumption increases

Engineering Contradiction:
Improvedata reading reliabilityVSAvoidpower-on time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system determines and stores voltage bin assignments during normal operation before power-off occurs. This preliminary determination ensures that when power is restored, the voltage bin information is already available, eliminating the need for time-consuming post-power-on scanning while maintaining reading reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates a copy of the voltage bin assignment information in metadata that can be quickly restored upon power-on. This copy serves as a surrogate for the full block characteristics, allowing the system to retrieve essential information without performing complete verification scans, thus reducing power-on time while maintaining data integrity.

Inventive Principle:
Principle #26Copying

3Reliability

If the memory device scans all blocks to determine voltage bins after power-on, then bit error rate is reduced, but performance penalty increases

Engineering Contradiction:
Improvebit error rateVSAvoidperformance overhead
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The voltage bin determination is performed as a preliminary action during normal operation before power-off. The results are stored in metadata structures that persist across power cycles. This approach ensures bit error rate is minimized through accurate voltage bin assignment while avoiding the performance penalty of repeated full-device scanning after power-on.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The essential voltage bin assignment data is extracted from the comprehensive block scanning process and stored separately in metadata. This extracted information can be quickly restored without re-performing the full scanning operation, thus reducing performance overhead while maintaining the accuracy needed to minimize bit error rates.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11676664B2Voltage bin selection for blocks of a memory device after power up of the memory device
Publication Date: 2023.06.13 MICRON TECHNOLOGY INC
  • US11676664B2 patent drawing
  • US11676664B2 patent drawing
  • US11676664B2 patent drawing

AI summary

A processing device of a memory sub-system is configured to detect a power on event that is associated with a memory device and indicates that power has been restored to the memory device; estimate a duration of a power off state preceding the power on event associated with the memory device; and update voltage bin assignments of a plurality of blocks associated with the memory device based on the duration of the power off state.