Voltage Generation Circuit With Trimmed Rectifiers for Offset Calibration

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Solution Overview

Problem

Voltage level offsets between rectification circuits in semiconductor apparatuses can lead to suboptimal operation, degrading overall system performance, as some circuits may not maintain the target internal voltage level.

Innovation Solution

A voltage generation circuit with selectively activated rectification circuits, a detection circuit for comparing pre-detection and reference signals, and a storage circuit for calibrating control signals to trim reference voltages, allowing for detection and compensation of voltage offsets, and an external system for calibrating the output voltage of each rectification circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple rectification circuits are distributed in the semiconductor apparatus, then the internal voltage can be provided to various loads (memory core, peripheral circuit, input/output circuit), but voltage level offsets between the rectification circuits occur, causing some circuits to fail to maintain the target voltage level

Engineering Contradiction:
ImproveAbility to provide internal voltage to multiple loadsVSAvoidVoltage level consistency across rectification circuits
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the detection circuit monitors the pre-detection signal from each rectification circuit and compares it with a reference signal. The external system receives this detection signal and adjusts the trim values of reference voltages accordingly, creating a closed-loop control system that compensates for voltage offsets and ensures consistent voltage levels across all distributed rectification circuits.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent changes the parameter of reference voltage trim values to compensate for voltage offsets. By adjusting these trim values based on detection signals, the system dynamically modifies the operating parameters of each rectification circuit to maintain target voltage levels despite manufacturing variations or environmental conditions.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If voltage offset calibration is performed by an external system, then the offset detection and compensation can be implemented, but additional communication and control interfaces are required between the semiconductor apparatus and external system

Engineering Contradiction:
ImproveVoltage offset detection accuracyVSAvoidCommunication interface requirements
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the complex calibration control logic from the semiconductor apparatus itself and places it in the external system. The semiconductor apparatus only needs to provide simple detection signals that indicate voltage levels, while the external system performs the sophisticated analysis and determines the appropriate trim value adjustments, thereby minimizing the complexity within the semiconductor apparatus.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The detection circuit acts as an intermediary that translates the internal voltage states of rectification circuits into standardized detection signals that can be communicated to the external system. This intermediary layer simplifies the communication interface by providing a clear, standardized signal format that bridges the internal circuitry and external calibration system.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11631438B2Voltage generation circuit, semiconductor apparatus including the same, and voltage offset calibration system
Publication Date: 2023.04.18 SK HYNIX INC
  • US11631438B2 patent drawing
  • US11631438B2 patent drawing
  • US11631438B2 patent drawing

AI summary

A voltage generation circuit includes a plurality of rectification circuits configured to be selectively activated depending on a plurality of first control signals, and to generate an internal voltage according to respective reference voltages capable of being independently trimmed depending on a plurality of second control signals; a detection circuit configured to generate a detection signal by comparing a pre-detection signal, generated in each of the plurality of rectification circuits, and a reference signal; and a storage circuit configured to store a pre-select signal provided from an external system, and to output a stored signal to each of the plurality of rectification circuits as the plurality of second control signals.