Voltage Circuit Stabilizing Bias Currents to Reduce GIDL Leakage
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Solution Overview
Problem
Semiconductor memories face challenges in reducing power consumption due to gate-induced drain leakage (GIDL) currents, which occur in field-effect transistors, leading to increased power consumption and heat generation.
Innovation Solution
A voltage circuit design that includes bias circuits providing stable, temperature- and voltage-independent voltages to reduce fluctuations in bias currents, stabilizing the output voltage and current, and incorporating capacitance for phase compensation, thereby minimizing GIDL currents by adjusting transistor conductance based on gate-source voltage variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a voltage circuit with bias circuits and phase compensation capacitance is implemented, then bias current fluctuations are reduced and output voltage is stabilized, but device complexity increases
Solution Approach 1:
The voltage circuit employs bias circuits that provide feedback mechanisms to sense and compensate for voltage fluctuations. The phase compensation capacitance works in conjunction with the bias circuits to automatically adjust and stabilize the output voltage, reducing bias current variations through closed-loop control without requiring complex external regulation systems.
Solution Approach 2:
Phase compensation capacitance acts as an intermediary element between the bias circuits and the output stage. These capacitance elements store and release energy to counteract voltage fluctuations, mediating the stabilization process and reducing the complexity burden on the main voltage generation circuitry.
2Loss of energy
If gate-induced drain leakage currents are reduced by adjusting transistor conductance, then power consumption decreases, but manufacturing precision requirements increase
Solution Approach 1:
The invention adjusts transistor conductance parameters dynamically through bias voltage control rather than relying solely on fixed manufacturing tolerances. By changing the gate-source voltage parameters, the transistor conductance is optimized to minimize GIDL currents while accommodating normal variations in manufacturing processes, reducing the stringency of precision requirements.
Solution Approach 2:
The voltage circuit is designed to self-regulate transistor conductance through its bias circuits. The system automatically adjusts operating points to minimize leakage currents without requiring external intervention or ultra-precise manufacturing, allowing standard fabrication processes to produce devices that meet performance targets.
Data Source
AI summary
Apparatuses and methods for generating a voltage are described. An example apparatus includes first, second, and third bias circuits configured to provide first, second, and third bias signals, respectively. The example apparatus further includes a voltage output circuit configured to receive the first, second, and third bias signals. The voltage output circuit includes an output circuit and a current circuit. The output circuit includes an output node, a first node, and an input circuit configured to receive the first bias signal. The output circuit is configured to provide an output voltage at the output node having a magnitude based on the magnitude of the first bias signal. The current circuit includes a first transistor configured to receive the second bias signal and further includes a second transistor configured to receive the third bias signal. The first transistor and second transistor are coupled in parallel and to the first node.