Voltage Contrast Defect Detection via Targeted ROI Segmentation

The patent divides the chip into multiple regions of interest (ROIs) based on defect probability assessments. Instead of uniformly inspecting all areas, the system segments the inspection task into high-priority ROIs where defects are more likely to occur and low-priority areas that can be inspected with reduced scrutiny or skipped entirely. This segmentation enables the system to maintain high defect detection coverage in critical areas while significantly reducing overall inspection time.

The system applies different inspection qualities and resolutions to different regions of the chip based on their defect probability. High-defect-probability regions receive full-resolution, thorough inspection, while low-defect-probability regions receive reduced inspection. This local quality approach ensures that inspection resources are concentrated where they are most needed, improving both detection coverage and speed simultaneously.

The system performs preliminary defect probability assessment and ROI identification before conducting detailed defect analysis. By pre-processing the data to identify where defects are most likely to occur and what types of defects to expect, the system prepares targeted inspection parameters in advance. This preliminary action enables subsequent high-resolution root cause analysis to be performed quickly and accurately only in the identified ROIs, rather than conducting exhaustive analysis across the entire chip.

The system applies partial action by performing complete defect analysis only in regions where defects are highly probable, rather than applying full analysis uniformly across all chip areas. The defect probability assessment allows the system to concentrate its analytical resources partially on specific ROIs, achieving high diagnostic accuracy where needed while maintaining overall inspection throughput.