Voltage Contrast Inspection for Semiconductor Pattern Defects
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Defect inspection in semiconductor manufacturing, particularly at nanometer technology process nodes, faces challenges with decreased defect capture rates due to insufficient resolution of optical inspection methods and low throughput of electron beam inspection tools.
Innovation Solution
The implementation of voltage contrast inspection (VCI) using a local electron beam scan, which differentiates induced surface voltages and secondary electron emission intensities to detect defects in patterned semiconductor wafers, allowing for high-resolution defect identification with improved throughput by scanning only specific parts of the defect inspection patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If optical inspection methods are used for defect detection, then inspection throughput is high, but defect capture rate decreases due to insufficient resolution at nanometer dimensions
Solution Approach 1:
The inspection area is segmented into multiple regions of interest (ROIs) that are scanned sequentially by the electron beam. This allows the system to focus computational and scanning resources only on areas where defects are likely to occur, rather than scanning the entire wafer surface, thereby maintaining high throughput while achieving high-resolution defect detection in critical areas.
Solution Approach 2:
The patent applies different inspection strategies to different regions of the wafer. High-resolution electron beam inspection is applied locally to specific ROIs where defects are most critical, while other areas receive different treatment. This localized approach optimizes the balance between inspection quality and throughput by concentrating resources where they are most needed.
2Measurement precision
If electron beam inspection is used to achieve high resolution, then defect detection sensitivity improves, but inspection throughput decreases due to low scanning speed
Solution Approach 1:
The wafer surface is divided into multiple regions of interest that are inspected sequentially rather than scanning the entire surface. This segmentation allows the electron beam to achieve high-resolution inspection in critical areas while reducing total inspection time by excluding non-critical areas from the scanning process.
Solution Approach 2:
The patent performs inspection on only a partial area (specific ROIs) rather than the complete wafer surface. This partial action approach achieves the necessary defect detection sensitivity in critical regions without the time penalty of inspecting entire wafer surfaces, thereby improving throughput while maintaining required inspection quality.
3Reliability
If full-area electron beam scanning is performed, then comprehensive defect coverage is achieved, but inspection time increases by 30 to 50 times compared to selective scanning
Solution Approach 1:
The inspection field is segmented into multiple regions of interest that are scanned sequentially. This allows comprehensive defect coverage within the ROIs to be achieved while reducing total inspection time by excluding areas outside the ROIs from the scanning process, thereby resolving the time penalty of full-area scanning.
Solution Approach 2:
The patent extracts and focuses inspection efforts on specific regions of interest that are most likely to contain defects or are most critical for device performance. By taking out only the necessary inspection areas from the full wafer surface, the system achieves adequate defect coverage with dramatically reduced inspection time.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly enhances defect detection rates for fine pitch patterns, reducing inspection time by 30 to 50 times compared to full-area scanning and simplifies the test wafer structure, while maintaining higher sensitivity than optical inspection methods.
Implementation Method 1
a part of the plurality of patterns is scanned with an electron beam to charge the plurality of patterns
Implementation Method 2
an intensity of secondary electrons emitted from the scanned part of the plurality of patterns is obtained
Data Source
AI summary
In a method for inspecting pattern defects, a plurality of patterns are formed over an underlying layer. The plurality of patterns are electrically isolated from each other. A part of the plurality of patterns are scanned with an electron beam to charge the plurality of patterns. An intensity of secondary electrons emitted from the scanned part of the plurality of patterns is obtained. One or more of the plurality of patterns that show an intensity of the secondary electrons different from others of the plurality of patterns are searched.