Voltage Control Circuit for Floating Gate Memory Using Charge Pumps
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing voltage control circuits for floating gate transistors in NVM devices require high voltage circuit processes to achieve the necessary voltage differences for operations like erase, which increases costs and reduces compatibility.
Innovation Solution
A voltage control circuit that uses a low voltage circuit process to generate two voltage signals with a difference of three times the power supply voltage, utilizing a capacitive device and a voltage control circuit with a positive charge pump and negative charge pump to provide the required voltages for floating gate transistors during erase and write operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high voltage circuit process is used to provide three times power supply voltage difference during erase operation, then the required voltage difference is achieved, but the cost increases and circuit compatibility decreases
Solution Approach 1:
The voltage control circuit is divided into multiple independent modules: a first voltage control circuit for generating voltages during read operations, and a second voltage control circuit for generating voltages during program and erase operations. This segmentation allows each module to be optimized independently, with the second module specifically designed to generate the required 3x power supply voltage difference using low-voltage compatible techniques such as charge pumps and voltage doubling circuits.
Solution Approach 2:
The patent changes the voltage generation approach by using a second voltage control circuit that can dynamically generate different voltage levels (0V, VCC, 2×VCC, 3×VCC) based on operational mode. This parameter change enables the system to achieve the required voltage difference for erase operations without being constrained by high-voltage process requirements, as the voltage levels are dynamically adjusted through circuit control rather than fixed by process limitations.
2Ease of operation
If high voltage circuitry is implemented to achieve necessary voltage differences, then erase and write operations can be performed, but device complexity and manufacturing cost increase
Solution Approach 1:
The second voltage control circuit is designed as a multi-functional module that can generate different voltage combinations for different operations. It provides voltage signals for both program operations (where one terminal receives 2×VCC and the other receives 0V) and erase operations (where one terminal receives 3×VCC and the other receives 0V). This universal design eliminates the need for separate high-voltage circuitry for each operation type, reducing overall device complexity while maintaining full operational capability.
Solution Approach 2:
The patent introduces a voltage control circuit as an intermediary between the power supply and the memory cell. This intermediary circuit actively manages voltage generation and distribution, using techniques such as charge pumping and voltage doubling to create the necessary voltage differences. By placing this intelligent intermediary in the voltage path, the system can achieve high voltage differences without requiring high-voltage process technology, thereby reducing device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for improved circuit compatibility and cost savings by implementing the voltage control circuit with a low voltage process while maintaining the necessary voltage differences for memory cell operations, enabling efficient voltage management without the need for high voltage circuitry.
Implementation Method 1
a positive charge pump configured to provide the first voltage signal
Implementation Method 2
a negative charge pump configured to convert the slope signal to the second voltage signal
Implementation Method 3
A voltage control circuit for a memory cell having a floating gate transistor and a capacitive device
Data Source
AI summary
A voltage control circuit for a memory cell having a floating gate transistor and a capacitive device, comprising a first input terminal, a second input terminal, a first output terminal and a second input terminal, wherein the first input terminal is configured to receive a power supply voltage, the second input terminal is configured to receive a ground reference, and wherein based on the power supply voltage and the ground reference, the first output terminal and the second output terminal respectively provides a first voltage signal and a second voltage signal, and wherein a voltage value of the first voltage signal is twice the power supply voltage, and a maximum of a voltage difference between the first voltage signal and the second voltage signal is three times the power supply voltage.