Voltage Controllers Manage Peak Power in Microprocessor Clusters

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Solution Overview

Problem

High-performance embedded microprocessor systems face challenges in managing peak power demands without increasing power supply capability or system operating margins, leading to voltage drops and increased costs due to the need for larger capacitors and power supplies.

Innovation Solution

The implementation of voltage controllers coupled to capacitors to detect and manage peak power events by providing additional current during voltage drops, with controlled recharging through series resistance, and a power management unit to adjust voltage levels in response to performance changes, allowing for reduced power supply stiffness without compromising peak performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If chip package and board level capacitors are employed to deliver peak current, then peak performance is achieved, but the power supply must recharge these capacitors adding to base load and requiring increased power supply capability

Engineering Contradiction:
Improvepeak power deliveryVSAvoidpower supply base load
Core Design Contradiction:
PowerVSUse of energy by stationary object

Solution Approach 1:

The patent introduces an intermediary energy storage mechanism (capacitors at package and board levels) that mediates between the power supply and the microprocessor cluster. This intermediary buffers peak current demands, allowing the power supply to operate at a lower base load while still supporting peak performance bursts.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system pre-charges capacitors during low-power intervals so that they are ready to deliver peak current when needed. This preliminary action allows the power supply to avoid continuously operating at peak capacity, reducing its base load requirements.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If operating margins for voltage and frequency are added to avoid system failure, then system reliability is improved, but the bill of materials increases without contributing to average system performance

Engineering Contradiction:
Improvesystem reliabilityVSAvoidbill of materials
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent employs voltage drop sensors that provide feedback about the actual voltage conditions on CPU core supply lines. This feedback enables the system to dynamically adjust dispatch rates and clock frequencies based on real-time voltage margins, avoiding the need for conservative static margin additions throughout the design.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system transitions from static operating margins to dynamic margin management. By continuously monitoring voltage conditions and adjusting performance parameters in real-time, the system achieves reliability without requiring excessive conservative margins in the bill of materials.

Inventive Principle:
Principle #15Dynamics

3Stability of the object's composition

If voltage drop sensors are employed for ad-hoc dispatch rate reduction, then voltage stability is improved, but the ratio between active decoupling capacitance and power supply stiffness remains unchanged

Engineering Contradiction:
Improvevoltage stabilityVSAvoidcapacitance to power supply stiffness ratio
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

Voltage drop sensors provide real-time feedback about voltage conditions, enabling dynamic adjustment of dispatch rates. This feedback mechanism stabilizes voltage by reducing load when voltage drops are detected, achieving voltage stability without requiring changes to the fundamental capacitance-to-stiffness ratio.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables peak performance bursts with a lower-cost power supply by actively managing peak power demands, reducing the need for increased capacitance and power supply capacity, thereby maintaining system stability and performance while minimizing costs.

Implementation Method 1

chip package and board level capacitors are employed. These deliver peak current before the power supply regulation can catch up with demand

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

The recharge rate may be controlled through a series resistance, in some embodiments, to reduce the load of recharging the capacitors on the power supply

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentEP2987216B1Active peak power management of a high performance embedded microprocessor cluster
Publication Date: 2018.03.21 APPLE INC
  • EP2987216B1 patent drawingFigure 1
  • EP2987216B1 patent drawingFigure 2

AI summary

In some embodiments, a system may include at least one voltage controller. At least one of the voltage controllers may assess, during use, an occurrence of a predetermined condition. In some embodiments, the system may include an at least first capacitor. The at least first capacitor may be coupled to at least one of the voltage controllers such that at least one of the voltage controllers engages the at least first capacitor to supply additional current when the predetermined condition occurs. When the increase in current is no longer required the at least first capacitor may be disengaged. The at least first capacitor may be charged when disengaged until a predetermined capacity.