Voltage Conversion Circuit with Bleed Module for Transistor Protection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing power management integrated circuits face high manufacturing costs due to the need for additional dopants to enhance the withstand voltage of PMOS and NMOS power transistors, which can lead to component burnout from abrupt current changes and high voltages.

Innovation Solution

A voltage conversion circuit design that includes a bleed module coupled to the power transistors, providing a current path when the transistor is cut off and the voltage reaches a threshold, reducing the voltage difference between the drain and source and preventing burnout, without increasing manufacturing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional dopants (MASKs) are added in the chip manufacturing process to improve withstand voltages of power transistors, then the reliability of the power management integrated circuit is improved, but the manufacturing cost increases

Engineering Contradiction:
Improvewithstand voltage of power transistorsVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

A clamp circuit is introduced as an intermediary component between the power transistors and the load. This clamp circuit captures and dissipates the inductive kickback energy from parasitic inductors, preventing voltage spikes from damaging the power transistors. By adding this intermediary protection mechanism, the patent achieves reliable voltage protection without requiring costly dopant modifications to the power transistors themselves.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If the PMOS power transistor is switched off abruptly to improve response speed, then the switching speed is improved, but a high voltage is generated that burns out internal components

Engineering Contradiction:
Improveswitching speedVSAvoidhigh voltage generation
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The clamp circuit is designed to be activated before voltage spikes can damage the power transistors. When the PMOS transistor switches off, the clamp circuit immediately captures the inductive kickback energy from parasitic inductors, providing a safe discharge path for the current. This beforehand cushioning prevents voltage overshoot and protects internal components from burnout while maintaining fast switching speeds.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Reliability

If the withstand voltage of power transistors is increased through dopant addition to prevent burnout, then the reliability is improved, but the device complexity increases

Engineering Contradiction:
Improvetransistor protectionVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The protection function is segmented from the power transistors themselves and implemented as a separate clamp circuit. Instead of modifying the power transistors with additional dopants, the patent divides the protection function into a distinct circuit module that captures and dissipates energy independently. This segmentation simplifies the manufacturing process by avoiding complex dopant addition steps while still providing reliable protection.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces the risk of transistor burnout by managing voltage differences and maintaining circuit reliability without the need for additional dopants, thus avoiding increased manufacturing costs.

Implementation Method 1

a second energy storage element, configured to be coupled to the first power transistor and the second power transistor, where when the first power transistor is conductive and the second power transistor is cut off, a power supply providing the first voltage charges the second energy storage element

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

a parasitic inductor L1 is formed between the source of the PMOS power transistor 12 and the first reference voltage, and a parasitic inductor L2 is formed between the source of the NMOS power transistor 13 and the ground

Methodology Applied
Scientific EffectElectromagnetic induction: Electromagnetic Induction

Data Source

PatentEP3276805B1Voltage conversion circuit
Publication Date: 2020.08.05 HUAWEI TECH CO LTD
  • EP3276805B1 patent drawingFigure 1~2
  • EP3276805B1 patent drawingFigure 3~4
  • EP3276805B1 patent drawingFigure 5~6

AI summary

The present invention discloses a voltage conversion circuit, including: a first power transistor; a second power transistor, where the second power transistor is cut off when the first power transistor is conductive and is conductive when the first power transistor is cut off; a first energy storage element; a second energy storage element, configured to be coupled to the first power transistor and the second power transistor; a bleed module, configured to be coupled to the first power transistor, and when the first power transistor is cut off and a voltage of a source of the first power transistor reaches a source threshold, provide a current path for a current flowing from the source of the first power transistor to ground. By means of the foregoing manner, in the present invention, a voltage difference between a drain and the source of the first power transistor can be decreased, thereby lowering a risk of burning out the first power transistor, and avoiding an increase in manufacturing costs.