Voltage Converter Control Using Split ADC Sampling
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Solution Overview
Problem
Existing digital control schemes for voltage converters, particularly integrated voltage regulators (IVRs), require complex and power-hungry analog-to-digital converters (ADCs) to achieve high sampling rates, making them costly and inefficient for high switching frequencies.
Innovation Solution
A voltage converter design that splits the ADC function into two parts: a first device for slow, high-accuracy absolute voltage measurement and a second device for fast, low-accuracy relative voltage measurement, using a sample-and-hold circuit and comparison circuit to generate an offset signal, allowing operation at high switching frequencies with reduced complexity and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a complex ADC is used to achieve high sampling rates for stability, then the sampling rate is improved, but the power consumption and device complexity increase significantly
Solution Approach 1:
The patent divides the ADC functionality into two separate devices: a first device that measures absolute voltage at a lower sampling rate, and a second device that measures relative voltage changes at a higher sampling rate. This segmentation allows each device to be optimized for its specific function, reducing the complexity of individual ADCs while maintaining the overall high sampling rate capability needed for stability.
Solution Approach 2:
The patent extracts the high-speed sampling function from the main ADC by implementing a separate second device that specifically measures relative voltage changes. This extracted function operates at the high sampling rate needed for stability, while the main ADC can use a lower sampling rate, thereby reducing the complexity and power consumption of the primary conversion path.
2Speed
If a complex ADC is used to achieve high sampling rates for stability, then the sampling rate is improved, but the power consumption increases
Solution Approach 1:
The patent segments the sampling function into two parts: absolute voltage sampling at a lower rate and relative voltage sampling at a higher rate. This segmentation reduces power consumption because the high-speed sampling only needs to detect changes from the previously measured absolute value, requiring less energy than continuous high-speed absolute sampling would demand.
Solution Approach 2:
The patent extracts the high-frequency sampling function into a dedicated second device that only measures voltage changes. This extraction allows the main power-consuming ADC to operate at a lower sampling rate, while the extracted relative measurement function handles the high-speed requirements with minimal power consumption.
3Speed
If the ADC is redesigned to achieve high sampling rates, then the sampling rate is improved, but the cost increases
Solution Approach 1:
The patent segments the ADC functionality into two simpler, separate devices rather than requiring one complex high-speed ADC. This segmentation simplifies the manufacturing process for each individual device, reducing development costs and making production more accessible while achieving the required overall sampling performance.
Solution Approach 2:
The patent extracts the high-speed relative measurement function from the main ADC design, allowing the primary device to be manufactured with standard, lower-cost components. The extracted function is implemented as a separate, simpler device that can be manufactured independently, reducing overall system cost compared to a single redesigned high-speed ADC.
4Stability of the object's composition
If a high sampling rate is used to maintain stability at high switching frequencies, then the stability is improved, but the die area increases
Solution Approach 1:
The patent segments the voltage measurement function into two specialized devices: one for absolute voltage and another for relative voltage changes. This segmentation reduces the die area because each device can be optimized for its specific function with minimal circuitry, rather than requiring a single large high-speed ADC that would consume significant chip real estate.
Solution Approach 2:
The patent extracts the high-frequency sampling function into a separate second device that only needs to detect voltage changes from the absolute reference. This extraction reduces the die area of the main device while maintaining stability, as the extracted function requires minimal circuitry compared to a full high-speed ADC implementation.
Data Source
AI summary
A voltage converter configured to provide an output voltage, the voltage converter comprising: a first device, configured to measure an absolute voltage with respect to a reference voltage; and a second device, configured measure a relative voltage with respect to the absolute voltage; such that the output voltage is regulated using the measurements of the absolute voltage and the relative voltage.