Voltage-to-Current Converter with Super Source Follower for PLL Jitter Reduction
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Solution Overview
Problem
Conventional voltage-to-current converters in integrated circuits suffer from added complexity in PLL loop design and poor power supply rejection, leading to degraded jitter performance due to noise from the unit gain buffer, which complicates phase noise and jitter performance.
Innovation Solution
A super source follower circuit is used to lower the impedance of a first node, coupled with a digital control circuit that adjusts the current based on the current through the super source follower, and an output transistor outputs a current based on the voltage received at its gate, implemented in a voltage-to-current converter circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a unit gain buffer is used in the V-I converter, then the circuit can provide voltage buffering, but it adds poles to the PLL loop which complicates the design and degrades jitter performance
Solution Approach 1:
The patent removes the unit gain buffer from the V-I converter circuit. Instead of using a buffer to provide voltage buffering, the invention uses a different topology with a tail current source and switching network that directly converts voltage to current without requiring intermediate buffering stages, thereby eliminating the added poles and simplifying the PLL loop design.
Solution Approach 2:
The tail current source and switching network serve multiple functions simultaneously: they provide the voltage-to-current conversion, implements the buffering function, and maintain proper impedance characteristics without requiring separate buffer stages. This multi-functional approach eliminates the need for the unit gain buffer while preserving its essential functions.
2Reliability
If a unit gain buffer is used in the V-I converter, then voltage buffering is provided, but power supply rejection cannot be realized at high levels and device noise degrades VCO phase noise
Solution Approach 1:
The unit gain buffer is removed from the circuit to eliminate the source of device noise that degrades VCO phase noise. The alternative topology uses a tail current source with switching network that provides inherent noise immunity and high power supply rejection without the noise-generating buffer stage.
Solution Approach 2:
The tail current source acts as an intermediary element that provides high impedance to power supply variations, effectively blocking noise from propagating to the VCO. The switching network controlled by the voltage input signal converts the voltage signal to current while the tail current source maintains stable operation despite power supply fluctuations, achieving high PSR without buffers.
3Device complexity
If conventional V-I converter topology is used, then the circuit structure is simple, but it cannot achieve high power supply rejection and noise performance is degraded
Solution Approach 1:
The patent changes the operating parameters and topology of the V-I converter by using a tail current source configuration with switching network instead of a unit gain buffer. This parameter change enables the circuit to achieve high power supply rejection ratio while maintaining relatively simple structure, as the tail current source inherently provides high impedance to power supply variations.
Data Source
AI summary
A conversion circuit includes a super source follower circuit configured to lower an impedance of a first node. A digital control circuit is configured to adjust a current at the first node based on a current through the super source follower. An output transistor has a gate configured to receive a first signal. A drain of the output transistor is coupled to a first node, and a source of the output transistor is configured to output an output current based on a voltage of the first signal.