Voltage Detection Circuit for Power-On Reset Stability
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Solution Overview
Problem
Recent microfabricated memory and signal processing chips operating at low voltages face instability in power supply voltage levels immediately after power application, leading to unreliable operation of power-on reset (POR) circuits due to unstable mask signal generation, which can result in premature cancellation of the POR state and chip malfunction.
Innovation Solution
A voltage detection circuit comprising p-type MOS transistors and resistors that generate a mask signal, where the logic change is based on relative variations of transistor characteristics and resistance values, ensuring the mask signal remains stable until the power supply voltage reaches a predetermined level, preventing premature POR state cancellation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional POR circuits are used in low-voltage chips, then the chip can operate at low voltage, but the mask signal becomes unstable immediately after power application, causing premature POR state cancellation
Solution Approach 1:
The circuit performs preliminary action by pre-establishing stable reference voltages (Vref1 and Vref2) through dedicated voltage division circuits before the main comparison operation. These reference voltages are generated in advance using resistor dividers (R1-R4) that create stable voltage references independent of the fluctuating power supply voltage, ensuring the mask signal remains stable during the critical power-up phase.
Solution Approach 2:
The patent introduces intermediary elements including buffer circuits (first buffer and second buffer) that act as mediators between the voltage division circuits and the differential pair transistors. These buffers isolate and stabilize the reference voltages, preventing direct coupling of power supply fluctuations to the mask signal generation node. The buffers serve as intermediary stages that filter out voltage noise and provide clean, stable reference levels for accurate comparison.
2Speed
If the power supply voltage stabilizes quickly, then the chip can start operating faster, but the mask signal may become unstable and cause premature POR cancellation
Solution Approach 1:
The circuit implements feedback through the differential pair transistor configuration where the mask signal node continuously monitors the relationship between the two reference voltages. The differential pair (first and second transistors) provides automatic feedback adjustment: when Vref1 exceeds Vref2, the mask signal is pulled low to maintain POR state; when Vref2 exceeds Vref1, the mask signal is pulled high to exit POR state. This feedback mechanism ensures stable POR operation until the power supply voltage reaches the appropriate threshold level.
Solution Approach 2:
The patent applies beforehand cushioning by designing the voltage division circuits with carefully selected resistor ratios to create reference voltages that are inherently more stable than the power supply voltage during the transition phase. The resistor dividers (R1-R4) are configured to generate reference voltages that change more gradually and predictably during power-up, cushioning the mask signal node from abrupt voltage changes and preventing premature POR cancellation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution stabilizes the mask signal generation, ensuring reliable operation of POR circuits by maintaining the mask signal in a high state until the power supply voltage becomes stable, thus preventing premature cancellation and enhancing chip reliability.
Implementation Method 1
A voltage detection circuit includes: a first transistor and a first resistor connected in series between a power supply voltage node and a reference voltage node; a second transistor and a second resistor connected in series between the power supply voltage node and the reference voltage node; a third transistor and a third resistor connected in series between the power supply voltage node and the reference voltage node
Data Source
AI summary
A voltage detection circuit includes a first transistor and a first resistor connected in series between a power supply voltage node and a reference voltage node, a second transistor and a second resistor connected in series between the power supply voltage node and the reference voltage node, a third transistor and a third resistor connected in series between the power supply voltage node and the reference voltage node, and a signal generator that outputs a signal corresponding to a voltage of a connection node between the third transistor and the third resistor. The second transistor is first turned on among the first to third transistors and a voltage level of the power supply voltage node increases, turning off the third transistor, and then a current flows through the first transistor and the first resistor. When the third transistor is turned on, the signal generator changes a logic of the signal.